AS1860 datasheet(21/51 Pages) ETC2

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AS1860

Akros Silicon, Inc.

6399 San Ignacio Avenue, Suite 250, San Jose, CA 95119 USA

408.746.9000



http://www.AkrosSilicon.com

As the supply voltage from the PSE increases from 0V, the

AS1860 transitions through these operating states:

These five operating states have specific transition criteria

per the IEEE® PoE standard.

PD Reset State

When the voltage supplied to the AS1860 drops below

VRESET_MIN, the device enters the reset state. In reset

state, the AS1860 consumes very little power, the power

supply to the PD is disconnected and state condition reverts

to pre-classification.

PD Signature Detection State

During signature detection, the PSE applies a voltage to read

the PD power signature and validates the PD as standards

compliant.

To ascertain the power signature the PSE applies two

voltages in the signature voltage range and extracts a

signature resistance value from the I-V slope. The AS1860

signature resistance is specified by an external resistor

connected between the RSIG pin and the 48VIN pin. A

26.7kΩ external signature resistor is recommended.

Upon successful detection of the PD by a PSE the AS1860

disconnects the external signature resistor at the RSIG pin to

conserve power.

PD Classification State

Each class represents a power allocation level for the PD

and allows the PSE to manage power requirements between

multiple PDs. The AS1860 supports both IEEE® Std. 802.3af,

and two event classification per IEEE® Std. 802.3at (PoE+),

see Figure 29.

The AS1860 allows the user to set required classification

current via an external resistor connected between the

RCLASS pin and 48RTN (Paddle #1). See Table 14 for

recommended RCLASS resistor values.

During the classification state the PSE presents a voltage

between 14.5V and 20.5V which the AS1860 terminates in

the RCLASS resistor resulting in a PSE measurable current,

Iclass.

Table 14 - Classification Map

Class

Power

(Watts)

Iclass

Rclass

0.44-12.95

0 - 4 mA

2.05MΩ, 1%

0.44-3.84

9 - 12 mA

221kΩ, 1%

3.84-6.49

17 - 20 mA

115kΩ, 1%

6.49-12.95

26 - 30 mA

75kΩ, 1%

12.96-25.5

36 - 44 mA

49.9kΩ, 1%

Upon successful classification of the PD by a PSE the

AS1860 disconnects the external classification resistor at the

RCLASS pin.

PD Idle State

In the Idle state (between Classification and the ON state)

the AS1860 current is limited to monitoring circuitry needed

for detection of the ON state threshold.

PD ON State

At a voltage of 42V or higher the AS1860 enters the ON state

and full power is available via the DC-DC Controller.

In IEEE® PoE compliant systems the PSE remotely detects

either a DC or AC Maintain Power Signature (MPS) state in

the PD platform. If either the PD PoE DC current is less than

10mA or the PD input AC impedance is above 26.25KΩ the

PSE may disconnect power. To guarantee such a power

disconnect the PD PoE DC current must be <5mA, and, the

AC impedance must be >2MΩ.

AT Detection Operation

The AS1860 has both software (I2C register bit) and

hardware (AT_DET pin) capabilities to indicate a PoE Plus

platform operating mode.

The AT_DET detect feature (either pin or software) provides

an indication when a PoE+ Power Source is available to the

system, from either an Ethernet cable to a Type 2 PSE or via

use of Local Power Supply using the LDET input pin. In the

case of hardware mode the AT_DET pin can be used to

directly drive an LED indicator. Since this pin is on the

secondary side of the AS1860 the user can interface it

directly to the PD system controller without additional

interfacing isolation circuitry. A typical platform usage of

AT_DET is to self-configure the PD platform based on

available power.

If not operating on Local Power, the AT_DET indicator stays

low during the PD Reset, Detection and Classification

phases. This indicator will be set high once the PD

recognizes completion of the 2-event Physical Layer

Classification as initiated by a Type 2 PSE. The pin will

remain high and be reset to zero after the occurrence of a PD

Reset State (48VIN < 2.7V) or a power-down event. AT_DET

remains low if the PSE partner is identified to be Type 1

during the classification phase.

Local Power Source

As mentioned above the AS1860 may also be powered from

a DC source other than the Ethernet line. This local source is

detected when the voltage at the LDET pin is 2 volts (typ)

below the voltage at pin 48VIN. When such a local power is

present the AS1860 will disable the power FET and thereby

disconnect from the PoE power source.

When operating in Local Power mode the AT_DET pin does

not indicate the far end PSE, and is always HIGH (see Table

15).

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