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AS1860 Datasheet(PDF) 9 Page - List of Unclassifed Manufacturers

Part # AS1860
Description  60W/90W PoE PD Controllers
PDF  51 Pages
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Manufacturer  ETC2 [List of Unclassifed Manufacturers]
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AS1860 Datasheet(HTML) 9 Page - List of Unclassifed Manufacturers

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AS1860
Akros Silicon, Inc.
6399 San Ignacio Avenue, Suite 250, San Jose, CA 95119 USA
408.746.9000
http://www.AkrosSilicon.com
9
44
EN2
D, I, PU
Hardware enables control for DC-DC regulator #2.
A capacitor to ground applied to this input is required for buck reset before start up.
This capacitor also sets the regulator delay start time, complimenting the internal fixed
soft-start time.
If Output #2 is not used, apply a Low (SGND) to this input, and connect FB2 to VP to
fully disable the regulator.
Secondary-Side: Regulator (Output #3)
34
AGND3
P
Sense ground for the Output #3, should be routed together with FB3 for differential
feedback sensing and then tied to ground at the feedback resistor. If Output #3 is not
used, AGND3 should still be tied to SGND.
36
LX3
A
Regulator switches node output. If Output #3 is not used, float LX3 (no user
connection).
35
FB3
A
Regulator voltage feedback input, also used to disable Output #3 (see EN3).
43
EN3
D, I, PU
Hardware enables control for DC-DC regulator #3.
A capacitor to ground applied to this input is required for buck reset before start up.
This capacitor also sets the regulator delay start time, complimenting the internal fixed
soft-start time.
If Output #3 is not used, apply a Low (SGND) to this input, and connect FB3 to VP to
fully disable the regulator.
Secondary-Side: Buck or Boost Controller (Output #4)
45
BUCK_EN
D, I
Selects between Buck and Boost mode of operation for Output #4.
Low = SGND = Boost.
High = Buck
If Output #4 is not used, tie BUCK_EN to SGND.
33
VBOOST
A
Boost voltage decoupling node. Decouple with a capacitor to LX4 when Output #4 is in
Buck mode. When operating Output #4 in Boost mode, this input should be connected
to Output #1. If Output #4 is not used, VBOOST should be tied to VP.
30
HSD4
A
High Side external Power FET gate Drive. If Output #4 is not used HSD4 should be left
floating with no user connection.
29
LSD4
A
Low Side external Power FET gate Drive. If Output #4 is not used LSD4 should be left
floating with no user connection.
24
AGND4
P
Sense ground for Controller #4, together with FB4 used for differential feedback
sensing at the feedback divider. If Output #4 is not used, AGND4 should still be tied to
SGND.
27
ISENP4
A
Positive current sense input. If Output #4 is not used, ISENP4 should be tied to SGND.
28
ISENN4
A
Negative current sense input. If Output #4 is not used, ISENN4 should be tied to
SGND.
25
FB4
A
Controller voltage feedback input, also used to disable output (see EN4).
42
EN4
D, I, PU
Enable control for Controller #4.
A capacitor to ground applied to this input is required for proper Controller #4 power-on
reset and start up. This capacitor also sets the controller delay start time,
complimenting the internal fixed soft-start time.
If Output #4 is not used, apply a Low (SGND) to this input, and connect FB4 to VP to
fully disable the controller.
26
COMP4
A
Controller compensation network connection. If Output #4 is not used COMP4 should
be left floating with no user connection.
31
LX4
A
Controller switch sense input. If not used (typical for Boost and LED Boost applications)
LX4 should be tied to SGND.
32
LX4_SENSE
A
Remote sense for LX4, used for differential sensing. Should be routed differentially with
LX4 (Buck mode). If not used (typical for Boost and LED Boost applications)
LX4_SENSE should be tied to SGND.
Secondary-Side: I2C Interface (or I/O in Hardware Mode)
57
SDIO / GPOS
OD
SDIO in Software mode, used for I2C bi-directional data input/output.
GPOS in Hardware mode, this output reflects the GPIP pin state (from the primary
side).
56
SCL / GPIS
I / I
SCL in Software mode, used as the I2C clock input.
GPIS in Hardware mode is an input that drives the GPOP pin state (on the primary-
side).



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