AS1860

Akros Silicon, Inc.

6399 San Ignacio Avenue, Suite 250, San Jose, CA 95119 USA

408.746.9000



http://www.AkrosSilicon.com

5

TABLES

Table 1 - AS1860 Signal Descriptions - Primary Side .......................................................................................................................... 6

Table 2 - AS1860 Signal Descriptions - Secondary Side...................................................................................................................... 8

Table 3 - Absolute Maximum Ratings................................................................................................................................................. 11

Table 4 - Normal Operating Conditions .............................................................................................................................................. 11

Table 5 - PD Section Electrical Characteristics .................................................................................................................................. 11

Table 6 - Primary Side Digital, I/O, and A/D Electrical Characteristics ............................................................................................... 12

Table 7 - Primary Side DC-DC Controller Electrical Characteristics................................................................................................... 13

Table 8 - Secondary Side Sync Controller (Output #1) Electrical Characteristics............................................................................... 13

Table 9 - Secondary Side DC-DC Regulators (Outputs #2, #3) Electrical Characteristics ................................................................. 14

Table 10 - Secondary Side DC-DC Controller (Output #4) Electrical Characteristics ......................................................................... 14

Table 12 - Thermal Protection Electrical Characteristics .................................................................................................................... 17

Table 13 - Isolation Electrical Characteristics ..................................................................................................................................... 17

Table 14 - Classification Map ............................................................................................................................................................. 21

Table 15 - AT_DET and LDET Operation........................................................................................................................................... 22

Table 16 - Typical LDET External Resistor Design............................................................................................................................. 22

Table 17 - PWM Clock Rate Configuration......................................................................................................................................... 23

Table 18 - Sync & Overlap Delay Timing Limit ................................................................................................................................... 24

Table 19 - SYNC_DLY & SYNC_OVL Resistor Calculation Example ................................................................................................ 24

Table 20 - AS1860 Device Address Configuration ............................................................................................................................. 33

Table 21 - AS1860 Register Address Word........................................................................................................................................ 34

Table 22 - AS1860 Register and Bit Summary................................................................................................................................... 35

Table 23 - Alarms and Power Status (Read-Only) - 00h .................................................................................................................... 36

Table 24 - Interrupt Mask (R/W) - 01h ................................................................................................................................................ 36

Table 25 - Interrupt Status (Read-Only) - 02h .................................................................................................................................... 37

Table 26 - PGOOD Voltage Masks (R/W) - 03h ................................................................................................................................. 37

Table 27 - Watchdog Enable, Mask, Service (R/W) - 04h .................................................................................................................. 38

Table 28 - PGOOD & Watchdog History (R/W) - 05h ......................................................................................................................... 38

Table 29 - Device Control and I/O Status (R/W) - 06h........................................................................................................................ 39

Table 30 - Watchdog Timeout (R/W) - 07h......................................................................................................................................... 39

Table 31 - ADCIN Voltage (Read-Only) - 08h..................................................................................................................................... 39

Table 32 - ADCIN Alarm Threshold (R/W) - 09h................................................................................................................................. 39

Table 33 - PD Status and System Clock Control (R/W) - 0Ah ............................................................................................................ 39

Table 34 - PD Voltage (Read-Only) - 0Bh .......................................................................................................................................... 40

Table 35 - PD Current (Read-Only) - 0Ch .......................................................................................................................................... 40

Table 36 - PD Over-Current Alarm Threshold (R/W) - 0Dh ................................................................................................................ 40

Table 37 - Outputs 1, 2 Disable & Margin Control (R/W) - 0Eh .......................................................................................................... 41

Table 38 - Outputs 3, 4 Disable & Margin Control (R/W) - 0Fh .......................................................................................................... 41

Table 39 - PoE Design Framework Summary .................................................................................................................................... 42