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TAS3103 Datasheet(PDF) 109 Page - Texas Instruments |
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TAS3103 Datasheet(HTML) 109 Page - Texas Instruments |
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109 / 146 page  3−49 Dither Block S Slave Addr Ack Sub-Addr Distribution 1 Mix Ack Ack Ack Ack Ack xxxxxxxx xxxxxxx l s b xxxxxxxx m s b xxx 0000 Distribution 2 Mix Ack Ack Ack Ack xxxxxxxx xxxxxxx l s b xxxxxxxx m s b xxx 0000 LFSR1 Mix and LFSR2 Mix Are 5.23 Format Coefficients S Slave Addr Ack Sub-Addr Dither Seed Ack Ack Ack Ack Ack xxxxxx l s b 00000000 00000000 m s b xxxxxx l s b m s b 0xC6 0xC7 Condensed LFSR2 Seed Condensed LFSR1 Seed Linear Feedback Shift Register Block Dither 1 Dither 2 Dither 3 LFSR1 LFSR2 Seed Build Logic L − W 0 +W 0.25 0.5 p Output Sampler St1 St2 St3 St4 St5 St6 NOTE: W = 16.0 => 0x000008000000 in 25.23 Format O G I C Σ Σ Σ S Slave Addr Ack Sub-Addr Ack Ack Ack Ack Ack xxxxxxxx xxxxxxx l s b xxxxxxxx m s b xxx 0000 0x81 S Slave Addr Ack Sub-Addr Ack Ack Ack Ack Ack xxxxxxxx xxxxxxx l s b xxxxxxxx m s b xxx 0000 0x80 S Slave Addr Ack Sub-Addr Ack Ack Ack Ack Ack xxxxxxxx xxxxxxx l s b xxxxxxxx m s b xxx 0000 0x7F Figure 3−29. Dither Data Block Diagram |
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