TAS3103 datasheet(122/146 Pages) TI

122 / 146 page

4−6

4.4.4

Serial Audio Port Master Mode Signals Over Recommended Operating Conditions

(unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNITS

f(LRCLK)

Frequency LRCLK

kHz

tr(LRCLK)

Rise time, LRCLK

CL = 30 pF

11.4

tf(LRCLK)

Fall time, LRCLK

CL = 30 pF

11.2

f(SCLKOUT)

Frequency (1/tcyc), SCLKOUT1/SCLKOUT2

See Note 13

32FS

MHz

tr(SCLKOUT)

Rise time, SCLKOUT1/SCLKOUT2

CL = 30 pF

9.5

tf(SCLKOUT)

Fall time, SCLKOUT1/SCLKOUT2

CL = 30 pF

9.8

tpd1(SCLKOUT1) Propagation delay, SCLKOUT1 falling edge to LRCLK edge

4.1

tpd1(SCLKOUT2) Propagation delay, SCLKOUT2 falling edge to LRCLK edge

4.3

tpd2

Propagation delay, SCLKOUT2 falling edge to SDOUT

3.4

tsu

Setup time, SDIN to SCLKOUT1 rising edge

18.4

Hold time, SDIN from SCLKOUT1 rising edge

tsk

Skew time, SCLKOUT1 to SCLKOUT2

0.8

NOTE 13: Typical duty cycle is 50/50.

LRCLK

(Output)

SDOUT1

SDOUT2

SDIN1

SDIN2

SDIN3

SCLKOUT1

SCLKOUT2

tr(SCLKOUT)

tf(SCLKOUT)

tsk

tr(SCLKOUT)

tpd1(SCLKOUT2)

tpd1(SCLKOUT1)

tf(LRCLK), tr(LRCLK)

tpd2

tsu

SDOUT3

SDIN4

Figure 4−4. TAS3100 Serial Audio Port Master Mode Timing Waveforms

TAS3103 Datasheet(PDF) 122 Page - Texas Instruments

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