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DA9211 Datasheet(PDF) 46 Page - Dialog Semiconductor

Part # DA9211
Description  Integrates two dual-phase buck converters
PDF  74 Pages
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Manufacturer  DIALOG [Dialog Semiconductor]
Direct Link  http://www.dialog-semiconductor.com/
Logo DIALOG - Dialog Semiconductor

DA9211 Datasheet(HTML) 46 Page - Dialog Semiconductor

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DA9211 and DA9212
Datasheet
Company confidential
Data sheet
Version <3.0>
<07-Jan-2015>
CFR0011-120-00 Rev 3
46 of 74
© 2015 Dialog Semiconductor GmbH
SLAVEadr
W
REGadr
A
DATA
A
P
S = START condition
A = Acknowledge (low)
P = STOP condition
W = Write (low)
Master to Slave
Slave to Master
7-bits
1-bit
8-bits
8-bits
A
S
Figure 43: 2-WIRE Byte Write (SDA Line)
When the host reads data from a register it first has to write to DA9211 and DA9212 with the target
register address and then read from DA9211 and DA9212 with a Repeated START or alternatively a
second START condition. After receiving the data, the host sends No Acknowledge and terminates
the transmission with a STOP condition. This is illustrated in Figure 44.
S
SLAVEadr W
A
REGadr
A
SLAVEadr
A
S = START condition
A = Acknowledge (low)
Sr = Repeated START condition
A
* = No Acknowledge
P = STOP condition
W = Write (low)
R = Read (high)
Master to Slave
7-bits
1-bit
8-bits
7-bits
DATA
A
*
Sr
R
1-bit
8-bits
SLAVEadr
A
7-bits
DATA
P
S
R
1-bit
8-bits
P
A
*
Slave to Master
S
SLAVEadr W
A
REGadr
P
7-bits
1-bit
8-bits
A
Figure 44: Examples of 2-WIRE Byte Read (SDA Line)
Consecutive (page) read out mode is initiated from the master by sending an Acknowledge instead of
Not acknowledge after receipt of the data word. The 2-WIRE control block then increments the
address pointer to the next 2-WIRE address and sends the data to the master. This enables an
unlimited read of data bytes until the master sends a Not acknowledge directly after the receipt of
data, followed by a subsequent STOP condition. If a non-existent 2-WIRE address is read out, the
DA9211 and DA9212 will return code zero. This is illustrated in Figure 45.
S
SLAVEadr W A
REGadr
A
SLAVEadr
A
S = START condition
A = Acknowledge (low)
Sr = Repeat START condition
A
* = No Acknowledge
P = STOP condition
W = Write (low)
R = Read (high)
Master to Slave
Slave to Master
7-bits
1 bit
8-bits
7-bits
DATA
A
Sr
R
1-bit
8-bits
S
SLAVEadr
W
A
REGadr
A
SLAVEadr
A
7-bits
1-bit
8-bits
7-bits
DATA
P
S
R
1-bit
8-bits
P
A
A
*
P
DATA
DATA
A
A
*
DATA
8-bits
8-bits
8-bits
Figure 45: Examples of 2-WIRE Page Read (SDA Line)
Note that the slave address after the Repeated START condition must be the same as the previous
slave address.
Consecutive (page) write mode is supported if the Master sends several data bytes following a slave
register address. The 2-WIRE control block then increments the address pointer to the next 2-WIRE
address, stores the received data and sends an Acknowledge until the master sends the STOP
condition. This is illustrated in Figure 46.



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