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DA9211 Datasheet(PDF) 17 Page - Dialog Semiconductor

Part # DA9211
Description  Integrates two dual-phase buck converters
PDF  74 Pages
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Manufacturer  DIALOG [Dialog Semiconductor]
Direct Link  http://www.dialog-semiconductor.com/
Logo DIALOG - Dialog Semiconductor

DA9211 Datasheet(HTML) 17 Page - Dialog Semiconductor

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DA9211 and DA9212
Datasheet
Company confidential
Data sheet
Version <3.0>
<07-Jan-2015>
CFR0011-120-00 Rev 3
17 of 74
© 2015 Dialog Semiconductor GmbH
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
tSP
CLK, SDA
(2-WIRE Mode)
spike suppression pulse
width
Fast/Fast+ mode
High Speed mode
0
0
50
10
ns
tfDA
Fall time of SDA signal
(2-WIRE Mode)
Fast @ Cb<550pF
HS @ 10<Cb<100pF
HS @ Cb<400pF
20+0.1Cb
10
20
120
80
160
ns
Table 9: 2-WIRE Control Bus Characteristics
TA = -40 to +85 ºC
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
tBUF
Bus free time from STOP
to START condition
0.5
µs
CB
Bus line capacitive load
150
pF
Standard/Fast/Fast+ Mode
fSCL
Clock frequency @ pin
SCL
0 (Note 1)
1000
kHz
tSU_STA
START condition set-up
time
0.26
µs
tH_STA
START condition hold
time
0.26
µs
tW_CL
Clock LOW duration
0.5
µs
tW_CH
Clock HIGH duration
0.26
µs
tR
Rise time
@ pin CLK and DATA
Input requirement
1000
ns
tF
Fall time
@ pin CLK and DATA
Input requirement
300
ns
tSU_D
Data set-up time
50
ns
tH_D
Data hold time
0
ns
High Speed Mode
fSCL_HS
Clock frequency @ pin
SCL
0 (Note 1)
3400
kHz
tSU_STA_HS
START condition set-up
time
160
ns
tH_STA_HS
START condition hold
time
160
ns
tW_CL_HS
Clock LOW duration
160
ns
tW_CH_HS
Clock HIGH duration
60
ns
tR_HS
Rise time
@ pin CLK and DATA
Input requirement
160
ns



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