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DA9211 Datasheet(PDF) 66 Page - Dialog Semiconductor |
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DA9211 Datasheet(HTML) 66 Page - Dialog Semiconductor |
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66 / 74 page ![]() DA9211 and DA9212 Datasheet Company confidential Data sheet Version <3.0> <07-Jan-2015> CFR0011-120-00 Rev 3 66 of 74 © 2015 Dialog Semiconductor GmbH Register Bit Type Label Def Description 0x106 INTERFACE2 7 R/W Er or! Bookma rk not defined. IF_TYPE 1 0: Power manager interface is 4-WIRE. Automatically configures GPIO3 and GPI4 as interface signals. The GPIO configuration is overruled. 1: Power manager interface is 2-WIRE 6 R/W PM_IF_HSM 0 Enables continuous high speed mode on 2-WIRE interface if asserted (no master code reguired) 5 R/W PM_IF_FMP 0 Enables 2-WIRE interface operating with fast mode+ timings if asserted 4 R/W PM_IF_V 0 0: Power manager interface in 2-WIRE mode is supplied from VDDCORE (4-WIRE always from VDDIO) 1: Power manager interface in 2-WIRE mode is supplied from VDDIO (4-WIRE always from VDDIO) 0:3 R/W (reserved) 0000 14.2.4.2 OTP Fusing Registers Register Bit Type Label Def Description 0x140 OTP_CONT2 7 R/W OTP_CONF_LOC K 0 0: Registers 0x54 to 0x5E and 0xD0 to 0xDA are not locked for OTP programming (should be selected for unmarked evaluation samples) 1: Registers 0x54 to 0x5E and 0xD0 to 0xDA are locked in OTP (no further fusing possible) 6 R/W OTP_APPS_LOC K 0 0: Registers 0x105, 0x106, 0x143 to 0x149 are not locked for OTP programming (should be selected for unmarked evaluation samples) 1: Registers 0x105, 0x106, 0x143 to 0x149 are locked in OTP (no further fusing possible) 5:0 R/W (reserved) 0000 00 Register Bit Type Label Def Description 0x141 OTP_ADDR 7:0 R/W OTP_ADDR 0x00 OTP Array address Register Bit Type Label Def Description 0x142 OTP_DATA 7:0 R/W OTP_DATA 0x00 OTP read/write data OTP_DATA written to OTP_ADDR selects the IC and accepts unlock sequence (1 + 3 bytes) |
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