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SLB128B Datasheet(PDF) 20 Page - National Semiconductor (TI) |
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SLB128B Datasheet(HTML) 20 Page - National Semiconductor (TI) |
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20 / 48 page ![]() Host Control Register Descriptions (Continued) Register Name: CFG2 Address Offset: 09h Default Value: 95h Access Method: R/W Bit Description 0 MDI (read only) 1 Reserved 2 RSEN (read only) — Receiver Sense 0= LVDS receiver connected to transmitter output, 1= No receiver connected Note: this function is valid only with DC coupled systems 3 TSEL — Interrupt generation 0= Interrupt bit (MDI) is generated by monitoring RSEN, fixed valve 4:6 MSEL (R/W) — Selects source for MSEL output pin 000= MSEN disabled 001= Output the MDI bit - interrupt 010= Output the RSEN bit - receiver detect 011–111= Reserved 7 VLOW (read only) 1= V REF set for low swing, 0= V REF set for LVTTL Register Name: CFG3 Address Offset: 0Ah Default Value: 81H Access Method: R/W Bit Description 0 R_FDE- Input DE strobe Polarity Select 0 = DE active Low, 1 = DE active High 3:1 Reserved 7:4 Reserved Register Name: CFG Address Offset: 0Bh Default Value: See Description Access Method: Read Only Bit Description 7:0 Contains state of input data bits 23:16 Register Name: PANEL Address Offset: 0Ch Default Value: See Description Access Method: R/W Bit Description 0:3 System defined Panel ID values set on ID0:3 pins (Read Only) 4:7 System defined Panel ID field which can be written/ read from host www.national.com 20 |
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