SLB128B datasheet(13/48 Pages) NSC

13 / 48 page

DS90C2501 Pin Description (Continued)

Pin Name

Pin No.

I/O Type

Description

OPTION SELECTION

BAL

I-LVTTL 2.5

Tie this pin to GND.

DUAL

I-LVTTL 2.5

LVTTL level input.

Input = GND for single pixel in-to-single pixel out mode. LVDS output

channels A0 to A3 are enabled, A4 to A7 are CLK2 are disable.

Input = V

CC for dual pixel in-to-dual pixel out mode. LVDS output channel A0

to A7, CLK1 and CLK2 are enable. Use a 10K typ. pull-up resistor.

Input = 1⁄2V

CC for single pixel in-to-dual pixel out mode. LVDS output channel

A0 to A7, CLK1 and CLK2 are enabled. See register CFG1 (08h) BPASS field

for more information.

See Figure 11 for example interface circuit.

COLOR

I-LVTTL 2.5

LVTTL level input to select RGB to LVDS color mapping.

Tie to GND for 18-bit/36-bit LCD.

Tie to GND to select conventional color mapping for 24-bit/48-bit LCD.

Tie to Logic “1” to select non-conventional color mapping for 24-bit/48-bit

LCD.

A0, A1, A2

115, 116,

117

I-LVTTL 2.5

These are input pins to select the 2-wire Serial Communication Slave Device

Address Lower Bits.

EDGE

I-LVTTL 2.5

Selects primary clock edge E1.

Tie to Logic “1” to select Rising edge for E1.

Tie to ground to select Falling edge for E1.

PANEL INTERFACE

A0P, A1P,

A2P, A3P

55, 53,

51, 47

O-LVDS

Positive LVDS differential data output.

When DUAL pin = GND, input to D0–D11 will be coming out of A0P to A3P.

For 6-bit color application, no connect for channel A3P.

When DUAL pin = 1⁄2V

CC, the first pixel going in D0–D11 will be coming out

of A0P to A3P, and the second pixel going in D0–D11 will come out of A4P to

A7P. For 6-bit color application, no connect for channels A3P and A7P.

When DUAL pin = V

CC, the first pixel going in D0–D11 will be coming out of

A0P to A3P, the second pixel going in D12–D23 will be coming out of A4P to

A7P. For 6-bit color application, no connect for channels A3P and A7P.

A0M, A1M,

A2M, A3M

56, 54,

52, 48

O-LVDS

Negative LVDS differential data output.

When DUAL pin = GND, input to D0–D11 will be coming out of A0M to A3M.

For 6-bit color application, no connect for channel A3M.

When DUAL pin = 1⁄2V

CC, the first pixel going in D0–D11 will be coming out

of A0M to A3M, and the second pixel going in D0–D11 will come out of A4M

to A7M. For 6-bit color application, no connect for channels A3M and A7M.

When DUAL pin = V

CC, the first pixel going in D0–D11 will be coming out of

A0M to A3M, the second pixel going in D12–D23 will be coming out of A4M

to A7M. For 6-bit color application, no connect for channels A3M and A7M.

A4P, A5P,

A6P, A7P

45, 43,

41, 39

O-LVDS

Positive LVDS differential data output for second pixel.

When DUAL pin = GND, input to D0–D11 will be coming out of A0P to A3P.

For 6-bit color application, no connect for channel A3P.

When DUAL pin = 1⁄2V

CC, the first pixel going in D0–D11 will be coming out

of A0P to A3P, and the second pixel going in D0–D11 will come out of A4P to

A7P. For 6-bit color application, no connect for channels A3P and A7P.

When DUAL pin = V

CC, the first pixel going in D0–D11 will be coming out of

A0P to A3P, the second pixel going in D12–D23 will be coming out of A4P to

A7P. For 6-bit color application, no connect for channels A3P and A7P.

SLB128B Datasheet(PDF) 13 Page - National Semiconductor (TI)

SLB128B Datasheet(HTML) 13 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48

Datasheet Download

Link URL