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SLB128B Datasheet(PDF) 3 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # SLB128B
Description  Transmitter with built-in scaler for LVDS Display Interface (LDI)
PDF  48 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

SLB128B Datasheet(HTML) 3 Page - National Semiconductor (TI)

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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V
CC)
−0.3V to +2.8V
Supply Voltage (V
CC3V)
−0.3V to +3.6V
CMOS/TTL Input Voltage
−0.3V to V
CC3V
CMOS/TTL Output
Voltage
−0.3V to (V
CC + 0.3V)
LVDS Driver Output
Voltage
−0.3V to (V
CC + 0.3V)
LVDS Output Short
Circuit
Duration
Continuous
Junction Temperature
+150˚C
Storage Temperature
−65˚C to +150˚C
Lead Temperature
(Soldering, 4 sec.)
+260˚C
Typical Package Power Dissipation Capacity @ 70˚C
and Max V
CC
128 CSP Package:
DS90C2501
1.8W
Maximum Operating Case Temperature: 97˚C
(measured at top center of package)
ESD Rating:
DS90C2501
(HBM, 1.5k
Ω, 100pF)
> 2kV
(EIAJ, 0
Ω, 200pF)
> 250 V
Recommended Operating
Conditions
Min
Nom
Max
Units
All Supply Voltage except
(V
CC3V)
2.250
2.5
2.750
V
V
CC3V Supply Voltage
3.0
3.3
3.6
V
Operating Free Air
Temperature (T
A)
0
+25
+70
˚C
Supply Noise Voltage (V
CC)
up to 33Mhz
100 mV
P-P
DC Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
LVCMOS/LVTTL DC SPECIFICATIONS (All input pins when operate in LVTTL level except DUAL pin. Note: On ID0, ID1
pins have typical 30K ohm internal pull-down, and ID2 and ID3 pins have typical 3K ohm internal pull-down.)
V
IH
High Level Input Voltage
V
REF =VCC3V
2.0
V
CC3V
V
V
IL
Low Level Input Voltage
V
REF =VCC3V
-0.3
0.8
V
V
CL
Input Clamp Voltage
I
CL = 18 mA
-0.9
-1.5
V
I
IN
Input Current
V
IN = 0.4V, or VCC
+1.8
+15
µA
V
IN = GND
−15
0
µA
LVCMOS/LVTTL DC SPECIFICATIONS for DUAL pin, pin35
V
IH DUAL
High Level Input Voltage (for
dual pixel in to dual pixel
out).
PD=V
CC3V
2.0
V
CC
V
V
IM DUAL
High Level Input Voltage (for
single pixel in to dual pixel
out).
PD=V
CC3V
1
⁄2V
CC−0.1
1
⁄2V
CC
1
⁄2V
CC+0.1
V
V
IL DUAL
High Level Input Voltage (for
single pixel in to single pixel
out).
PD=V
CC3V
0
0.4
V
V
CL
Input Clamp Voltage
I
CL = 18 mA
-0.9
-1.5
V
I
IN
Input Current
V
IN = 0.4V, VCC
1.8
15
µA
V
IN = Gnd
-15
0
µA
LVCMOS/LVTTL DC SPECIFICATIONS for MSEN, pin 98
V
OL
Low level Open Drain Output
Voltage
I
OL = 2 mA
0.1
0.3
V
LVCMOS/LVTTL DC SPECIFICATIONS (Pin 62 to pin 69 when operate in 3.3V LVTTL level)
V
OH
High Level Input Voltage
I
OL = 2 mA
2.2
2.95
V
V
OL
Low Level Input Voltage
0.055
0.4
V
I
OS
Output Short Circuit Current
V
OUT = 0V
-50
−120
mA
www.national.com
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