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Video Processor Module (Continued)

SIGN_FREE (Signature Free Run).

0: Disable. (Default) If this bit was previously set to 1, the signature process stops at the end of the current frame (i.e., at

the next falling edge of VSYNC).

1: Enable. If SIGN_EN (bit 0) = 1, the signature register captures data continuously across multiple frames.

Reserved.

SIGN_EN (Signature Enable).

0: Disable. (Default) The SIG_VALUE (bits [31:8]) is reset to 000001h and held (no capture).

1: Enable. The next falling edge of VSYNC is counted as the start of the frame to be used for CRC checking with each pixel

clock beginning with the next VSYNC.

If SIGN_FREE (bit 2) = 1, the signature register captures the pixel data signature continuously across multiple frames.

If SIGN_FREE (bit 2) = 0, a signature is captured for one frame at a time, starting from the next falling VSYNC.

After a signature capture, the SIG_VALUE can be read to determine the CRC check status. SIGN_EN can then be reset to

initialize the SIG_VALUE as an essential preparation for the next round of CRC check.

Offset 48h-4Bh

Device and Revision Identification (RO)

Reset Value: 0000xxxxh

31:16

Reserved.

15:8

REV_ID (Revision ID). Seedeviceerrata forvalue.

7:0

DEV_ID (Device ID). Seedeviceerrata forvalue.

Offset 4Ch-4Fh

Video De-Interlacing and Alpha Control Register (R/W)

Reset Value: 00060000h

31:22

Reserved.

21:20

ALPHA3_WIN_PRIORITY (Alpha Window 3 Priority). Determines the priority of Alpha Window 3. A higher number indi-

cates a higher priority. Priority is used to determine display order for overlapping alpha windows.

00: Lowest priority (default).

01: Medium priority.

10: Highest priority.

11: Illegal.

Note:

Priority of enabled alpha windows must be different.

19:18

ALPHA2_WIN_PRIORITY (Alpha Window 2 Priority). Determines the priority of Alpha Window 2. A higher number indi-

cates a higher priority. Priority is used to determine display order for overlapping alpha windows.

00: Lowest priority (default).

01: Medium priority.

10: Highest priority.

11: Illegal.

Note:

Priority of enabled alpha windows must be different.

17:16

ALPHA1_WIN_PRIORITY (Alpha Window 1 Priority). Determines the priority of Alpha Window 1. A higher number indi-

cates a higher priority. Priority is used to determine display order for overlapping alpha windows.

00: Lowest priority (default).

01: Medium priority.

10: Highest priority.

11: Illegal.

Note:

Priority of enabled alpha windows must be different.

15:14

Reserved

GV_SEL (GV Select). Selects input video format.

0: YUV format.

1: RGB format.

Note:

Mixing and blending configurations are created using bits [13, 11:9] of this register. See Table 6-1 "Valid Mix-

ing/Blending Configurations" on page 327.

If this bit is set to 1, EN_42X (F4BAR0+Memory Offset 00h[28]) must be programmed to 0.

Table 6-7. F4BAR0+Memory Offset: Video Processor Configuration Registers (Continued)

Bit

Description

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