TMS320VC5416 datasheet(17/98 Pages) TI1

17 / 98 page

Functional Overview

GPIO

MBus

64K RAM

Dual Access

Program/Data

McBSP1

McBSP2

McBSP3

RHEA Bus

APLL

TIMER

JTAG

Clocks

RHEAbus

RHEA

Bridge

TI BUS

xDMA

logic

16K Program

ROM

Enhanced XIO

P, C, D, E Buses and Control Signals

XIO

16HPI

54X cLEAD

16 HPI

64K RAM

Single Access

Program

3.1

Memory

3.1.1

Data Memory

TMS320VC5416

Fixed-Point Digital Signal Processor

www.ti.com

SPRS095P – MARCH 1999 – REVISED OCTOBER 2008

The following functional overview is based on the block diagram in Figure 3-1.

Figure 3-1. TMS320VC5416 Functional Block Diagram

The device provides both on-chip ROM and RAM memories to aid in system performance and integration.

The data memory space addresses up to 64K of 16-bit words. The device automatically accesses the

on-chip RAM when addressing within its bounds. When an address is generated outside the RAM bounds,

the device automatically generates an external access.

The advantages of operating from on-chip memory are as follows:

• Higher performance because no wait states are required

• Higher performance because of better flow within the pipeline of the central arithmetic logic unit

(CALU)

• Lower cost than external memory

• Lower power than external memory

The advantage of operating from off-chip memory is the ability to access a larger address space.

Submit Documentation Feedback

Functional Overview

TMS320VC5416 Datasheet(PDF) 17 Page - Texas Instruments

TMS320VC5416 Datasheet(HTML) 17 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98

Datasheet Download

Link URL