TMS320VC5416 datasheet(85/98 Pages) TI1

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5.5.11 Host-Port Interface Timing

5.5.11.1

HPI8 Mode

TMS320VC5416

Fixed-Point Digital Signal Processor

www.ti.com

SPRS095P – MARCH 1999 – REVISED OCTOBER 2008

Table 5-32 and Table 5-33 assume testing over recommended operating conditions and P = 0.5 *

processor clock (see Figure 5-28 through Figure 5-31). In the following tables, DS refers to the logical OR

of HCS, HDS1, and HDS2. HD refers to any of the HPI data bus pins (HD0, HD1, HD2, etc.). HAD stands

for HCNTL0, HCNTL1, and HR/W.

Table 5-32. HPI8 Mode Timing Requirements

5416-120

5416-160

UNIT

MIN

MAX

Setup time, HBIL and HAD valid before DS low (when HAS is not used), or HBIL and HAD

tsu(DSL-HBV)

valid before HAS low

Hold time, HBIL and HAD valid after DS low (when HAS is not used), or HBIL and HAD

th(DSL-HBV)

valid after HAS low

tsu(HSL-DSL)

Setup time, HAS low before DS low

tw(DSL)

Pulse duration, DS low

tw(DSH)

Pulse duration, DS high

tsu(HDV-DSH)

Setup time, HD valid before DS high, HPI write

th(DSH-HDV)W

Hold time, HD valid after DS high, HPI write

Setup time, HDx input valid before CLKOUT high, HDx configured as general-purpose

tsu(GPIO-COH)

input

th(GPIO-COH)

Hold time, HDx input valid before CLKOUT high, HDx configured as general-purpose input

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Electrical Specifications

TMS320VC5416 Datasheet(PDF) 85 Page - Texas Instruments