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TMS320VC5416 Datasheet(PDF) 40 Page - Texas Instruments |
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TMS320VC5416 Datasheet(HTML) 40 Page - Texas Instruments |
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40 / 98 page  Hex 0000 0030 0031 003F Reserved 7FFF 8000 0000 FFFF 0032 0033 Hex 0000 FFFF On-Chip DARAM4 8K Words On-Chip DARAM5 8K Words On-Chip DARAM6 8K Words On-Chip DARAM7 8K Words 9FFF A000 BFFF C000 DFFF E000 Reserved DRR22 DRR12 DXR22 DXR12 RCERA2 XCERA2 RECRA0 XECRA0 0034 0035 0036 0037 0038 0039 003A 003B 003C 0040 0041 0042 0043 DRR21 DRR11 DXR21 DXR11 RCERA1 XCERA1 0044 0049 004A 004B 004C 0020 0021 005F 0022 0023 DRR20 DRR10 DXR20 DXR10 0024 002F 001F 005F 0060 0080 On-Chip DARAM3 8K Words 1FFF 2000 3FFF 4000 5FFF 6000 Scratch-Pad RAM 007F On-Chip DARAM2 8K Words On-Chip DARAM1 8K Words On-Chip DARAM0 8K Words Data Space (See Breakout) I/O Space Data Space Data Space (0000 - 005F) Reserved Reserved Reserved Reserved Reserved Reserved 3.12.4 DMA Priority Level 3.12.5 DMA Source/Destination Address Modification TMS320VC5416 Fixed-Point Digital Signal Processor SPRS095P – MARCH 1999 – REVISED OCTOBER 2008 www.ti.com Figure 3-18. On-Chip DMA Memory Map for Data and IO Space (DLAXS = 0 and SLAXS = 0) Each DMA channel can be independently assigned high- or low-priority relative to each other. Multiple DMA channels that are assigned to the same priority level are handled in a round-robin manner. The DMA provides flexible address-indexing modes for easy implementation of data management schemes such as autobuffering and circular buffers. Source and destination addresses can be indexed separately and can be post-incremented, post-decremented, or post-incremented with a specified index offset. 40 Functional Overview Submit Documentation Feedback |
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