Electronic Components Datasheet Search
  English  ▼

X  

HT32F52230 Datasheet(PDF) 18 Page - Holtek Semiconductor Inc

Part # HT32F52230
Description  32-Bit ARM Cortex-M0 Microcontroller
PDF  39 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  HOLTEK [Holtek Semiconductor Inc]
Direct Link  http://www.holtek.com
Logo HOLTEK - Holtek Semiconductor Inc

HT32F52230 Datasheet(HTML) 18 Page - Holtek Semiconductor Inc

Back Button HT32F52230 Datasheet HTML 14Page - Holtek Semiconductor Inc HT32F52230 Datasheet HTML 15Page - Holtek Semiconductor Inc HT32F52230 Datasheet HTML 16Page - Holtek Semiconductor Inc HT32F52230 Datasheet HTML 17Page - Holtek Semiconductor Inc HT32F52230 Datasheet HTML 18Page - Holtek Semiconductor Inc HT32F52230 Datasheet HTML 19Page - Holtek Semiconductor Inc HT32F52230 Datasheet HTML 20Page - Holtek Semiconductor Inc HT32F52230 Datasheet HTML 21Page - Holtek Semiconductor Inc HT32F52230 Datasheet HTML 22Page - Holtek Semiconductor Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 18 / 39 page
background image
Rev. 1.21
18 of 39
April 11, 2017
32-Bit ARM® Cortex™-M0+ MCU
HT32F52220/HT32F52230
Clock Structure
4-16 MHz
HSE XTAL
8 MHz
HSI RC
32 kHz
LSI RC
Legend:
HSE = High Speed External clock
HSI = High Speed Internal clock
LSI = Low Speed Internal clock
WDTSRC
PLLSRC
AHB Prescaler
1,2,4,8,16,32
FCLK
( Free running clock)
STCLK
(to SysTick)
CK_ADC IP
CK_WDT
WDTEN
CK_REF
CK_HSI/16
CK_HSE/16
CK_SYS/16
CKOUT
CKOUTSRC[2:0]
HSEEN
HSIEN
LSIEN
fCK_SYS,max = 40 MHz
CK_LSI
Reserved
CK_AHB/16
CK_HSI
CK_HSE
PCLK ( AFIO, ADC,
SPI, USART, UART,
I2C, GPTM, SCTMx,
BFTM, EXTI, WDT)
PLL
Clock
Monitor
PLLEN
CK_PLL
ADCEN
f CK_PLL,max = 40 MHz (Recommended)
CK_LSI
HCLKS
( to SRAM)
HCLKF
( to Flash)
CM0PEN
FMCEN
SRAMEN
1
0
1
0
000
001
010
011
100
101
110
CK_SYS
SW[2:0]
00x
011
010
111
110
8
HCLKC
( to CortexTM-M0+)
CM0PEN
(control by HW)
Prescaler
1 ~ 32
CK_REF
Divider
CKREFPRE
HCLKBM
( to Bus Matrix)
BMEN
HCLKAPB
( to APB Bridge)
APBEN
Peripherals
Clock
Prescaler
1,2,4,8
ADC
Prescaler
1,2,3,4,8...
00
01
10
11
PCLK
PCLK/2
PCLK/4
PCLK/8
SPIEN
EXTIEN
CK_GPIO
( to GPIO port)
GPIOBEN
GPIOAEN
CKREFEN
CM0PEN
CM0PEN
CM0PEN
Reserved
Figure 3 Clock Structure



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com