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HT32F52230 Datasheet(PDF) 34 Page - Holtek Semiconductor Inc |
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HT32F52230 Datasheet(HTML) 34 Page - Holtek Semiconductor Inc |
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34 / 39 page ![]() Rev. 1.21 34 of 39 April 11, 2017 32-Bit ARM® Cortex™-M0+ MCU HT32F52220/HT32F52230 SCK (CPOL= 0) SCK (CPOL= 1) MOSI MISO MOSI MISO tSCK(H) tSCK(L) tSCK DATA VALID DATA VALID DATA VALID DATA VALID DATA VALID DATA VALID DATA VALID DATA VALID tV(MO) CPHA = 0 CPHA = 1 tH(MO) tH(MI) tSU(MI) tV(MO) tH(MO) tSU(MI) tH(MI) DATA VALID DATA VALID DATA VALID DATA VALID Figure 9 SPI Timing Diagrams – SPI Master Mode SCK (CPOL=0) SCK (CPOL=1) MOSI MISO tSCK(H) tSCK(L) tSCK MSB/LSB OUT MSB/LSB IN tV(SO) tH(SO) tSU(SI) tH(SI) SEL LSB/MSB OUT LSB/MSB IN tA(SO) tSU(SEL) tDIS(SO) tH(SEL) Figure 10 SPI Timing Diagrams – SPI Slave Mode with CPHA=1 |
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