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WM0011 Datasheet(PDF) 74 Page - Cirrus Logic

Part # WM0011
Description  General Purpose Low-Power Audio DSP
PDF  233 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

WM0011 Datasheet(HTML) 74 Page - Cirrus Logic

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WM0011
Production Data
w
PD, Rev 4.1, August 2013
74
CCM_IOCTRL1
I/O CONTROL 1 REGISTER
Address = 0xF000_0060
Default value = 0x7777_0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
BITS
FIELD
NAME
S/W
ACCESS
RESET
VALUE
FIELD
DESCRIPTION
22
CLKOUT_DS
RW
0x1
CLKOUT/GPIO28 output drive strength
0 = Reduced strength
1 = Full strength
21
CLKOUT_PD
RW
0x1
CLKOUT/GPIO28 pull-down control
0 = Disabled
1 = Enabled
20
CLKOUT_IE
RW
0x1
CLKOUT/GPIO28 input enable
0 = Disabled
1 = Enabled
19
Reserved
0x0
18
IRQ_DS
RW
0x1
IRQ
¯¯¯ output drive strength
0 = Reduced strength
1 = Full strength
17
IRQ_PU
RW
0x1
IRQ
¯¯¯ pull-up control
0 = Disabled
1 = Enabled
16
IRQ_IE
RW
0x1
IRQ
¯¯¯ input enable
0 = Disabled
1 = Enabled
Note - IRQ
¯¯¯ is output only; this bit has no effect
15:0
Reserved
0x0000
Table 33 CCM_IOCTRL1 Register
CCM_IOCTRL2 – I/O CONTROL 2 REGISTER
For custom-programmed devices, the start-up (default) contents of this register are configured in the
fuse memory, and can be set according to the application requirements.
CCM_IOCTRL2
I/O CONTROL 2 REGISTER
Address = 0xF000_0064
Default value = 0xFF7F_FF7F
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
BITS
FIELD
NAME
S/W
ACCESS
RESET
VALUE
FIELD
DESCRIPTION
31
AIF1BCLK_OE
RW
0x1
AIF1BCLK output enable
0 = Disabled (tri-state)
1 = Enabled
Valid for Bypass Mode B2 only. Must be enabled in Bypass Mode B2.
Note that in AIF Master mode, this bit has no effect.
30
AIF1BCLK_DS
RW
0x1
AIF1BCLK output drive strength
0 = Reduced strength
1 = Full strength
29
AIF1BCLK_PD
RW
0x1
AIF1BCLK pull-down control
0 = Disabled
1 = Enabled



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