WM0011 datasheet(35/233 Pages) CIRRUS

35 / 233 page

WM0011

Production Data

PD, Rev 4.1, August 2013

BOOT STATUS AND ERROR REPORTING

During boot-up, the WM0011 generates status and error codes for external monitoring of the start-up

process. These status codes are reported via the UART interface, and also via the SPI interface (in

SPI Slave mode only).

The SPI output comprises a 32-bit code for each status code. The status reporting on the SPI

interface is only supported in SPI Slave mode. A maximum of one status/error code can be reported

per Code Packet received. The applicable code will be transmitted for the duration of the next Code

Packet that follows after the Code Packet to which the status/error code relates. Accordingly, it should

be noted that some codes may be applicable but are not transmitted on the SPI interface.

The UART output is in the form of a single ASCII character code for each condition. The applicable

code(s) are reported immediately after receipt of the Code Packet to which they relate.

The SPI interface can report all of the defined status/error codes; the UART interface only supports a

reduced set of codes, as noted in Table 11.

The UART data output format is: 8 data bits, stop bit, no parity. If the Custom fuses are not

programmed, then the assumed clock rate (24.5MHz) gives 115,200bps data output. Other clock

frequencies and data bit rates are possible using the Custom fuse or PLL Configuration options.

The boot status and error report codes are defined in Table 11.

MESSAGE NAME

UART

(ASCII)

SPI SLAVE

DESCRIPTION

ROM_DBG_CODE_START

0x0FED0000

The C startup code has finished and ROM

application starting

ROM_DBG_FUSE_CLR

0x0FED0001

The contents of the fuse array are entirely blank

ROM_DBG_CUST_FUSE_CLR

0x0FED0002

The custom portion of the fuse array is blank

ROM_DBG_COMM_ENABLED

0x0FED0003

Communication port enabled and ROM ready for

image download

ROM_DBG_FUSE_DL_SUCCESS

0x0FED0004

Fuse Data received successfully.

ROM_DBG_FUSE_PROGRAMMED

0x0FED0005

Fuses are programmed, rebooting immediately.

ROM_DBG_GOOD_PKT

0x0FED0006

A valid data packet received

ROM_DBG_CODE_HDR_VALID

0x0FED0007

Valid Code Header Packet received

ROM_DBG_CODE_PKT_VALID

0x0FED0008

Valid Code Data packet received

ROM_DBG_CODE_DL_COMPLETE

0x0FED0009

An entire code image has been downloaded

ROM_DBG_CODE_SECURE_MATCH

0x0FED000A

The decrypted image header matches the SHA

result

ROM_DBG_CODE_UNSECURE_MATCH

0x0FED000B

The raw image header matches the SHA result,

with JTAG enabled

ROM_DBG_APP_START

0x0FED000C

This is the final message sent by the ROM prior to

starting the User Application.

ROM_DBG_WAITING_PLL_LOCK

0x0FED000D

This is sent as soon as the PLL is enabled while

waiting for LOCK to be asserted

ROM_DBG_PLL_PACKET_SUCCESS

0x0FED000E

The PLL packet was received and clocks have

been successfully changed

ROM_DBG_FUSE_INVALID

0x0FED0023

A CRC mismatch in the custom fuses detected

ROM_DBG_FUSE_DL_FAIL_BAD_LEN

0x0FED0024

The Custom Fuse image length is incorrect.

ROM_DBG_IMG_TOO_LONG

0x0FED0025

Final Data Packet exceeds total length specified in

Header Packet

ROM_DBG_PKT_OVERFLOW

0x0FED0026

Data packet received prior to previous packet

finished processing possible overflow

ROM_DBG_CODE_UNSECURE_MISMATCH

0x0FED0027

The raw image header does NOT match the SHA

result w/ JTAG enabled

WM0011 Datasheet(PDF) 35 Page - Cirrus Logic

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