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WM0011 Datasheet(PDF) 81 Page - Cirrus Logic |
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WM0011 Datasheet(HTML) 81 Page - Cirrus Logic |
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81 / 233 page ![]() WM0011 Production Data w PD, Rev 4.1, August 2013 81 CCM_IOCTRL5 I/O CONTROL 5 REGISTER Address = 0xF000_0070 Default value = 0x7D77_7777 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 BITS FIELD NAME S/W ACCESS RESET VALUE FIELD DESCRIPTION 25 UARTTX_PD RW 0x0 UARTTX/GPIO23 pull-down control 0 = Disabled 1 = Enabled 24 UARTTX_IE RW 0x1 UARTTX/GPIO23 input enable 0 = Disabled 1 = Enabled 23:0 Reserved 0x77_ 7777 Table 37 CCM_IOCTRL5 Register CCM_IOCTRL6 – I/O CONTROL 6 REGISTER For custom-programmed devices, the start-up (default) contents of this register are configured in the fuse memory, and can be set according to the application requirements. CCM_IOCTRL6 I/O CONTROL 6 REGISTER Address = 0xF000_0074 Default value = 0x7777_7770 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 BITS FIELD NAME S/W ACCESS RESET VALUE FIELD DESCRIPTION 31 TDEBUG_OE RW 0x0 TDEBUG/TMSDEBUG output enable 0 = Disabled (tri-state) 1 = Enabled 30 TDEBUG_DS RW 0x1 TDEBUG/TMSDEBUG output drive strength 0 = Reduced strength 1 = Full strength 29 TDEBUG_PU RW 0x1 TDEBUG/TMSDEBUG pull-up control 0 = Disabled 1 = Enabled 28 TDEBUG_IE RW 0x1 TDEBUG/TMSDEBUG input enable 0 = Disabled 1 = Enabled 27 Reserved 0x0 26 TOCDRST_DS RW 0x1 TOCDRST ¯¯¯¯¯¯¯¯¯ drive strength 0 = Reduced strength 1 = Full strength Note - TOCDRST ¯¯¯¯¯¯¯¯¯ is input only; this bit has no effect 25 TOCDRST_PU RW 0x1 TOCDRST ¯¯¯¯¯¯¯¯¯ pull-up control 0 = Disabled 1 = Enabled 24 TOCDRST_IE RW 0x1 TOCDRST ¯¯¯¯¯¯¯¯¯ input enable 0 = Disabled 1 = Enabled 23 Reserved 0x0 |
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