Electronic Components Datasheet Search
  English  ▼

X  

WM8224 Datasheet(PDF) 20 Page - Cirrus Logic

Part # WM8224
Description  60MSPS 3-Channel AFE with Multiple Device Operation
PDF  50 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

WM8224 Datasheet(HTML) 20 Page - Cirrus Logic

Back Button WM8224 Datasheet HTML 16Page - Cirrus Logic WM8224 Datasheet HTML 17Page - Cirrus Logic WM8224 Datasheet HTML 18Page - Cirrus Logic WM8224 Datasheet HTML 19Page - Cirrus Logic WM8224 Datasheet HTML 20Page - Cirrus Logic WM8224 Datasheet HTML 21Page - Cirrus Logic WM8224 Datasheet HTML 22Page - Cirrus Logic WM8224 Datasheet HTML 23Page - Cirrus Logic WM8224 Datasheet HTML 24Page - Cirrus Logic Next Button
Zoom Inzoom in Zoom Outzoom out
 20 / 50 page
background image
WM8224
Production Data
w
PD, Rev 4.2, September 2013
20
In situations where the input video signal does not have a stable reference level it may be necessary
to clamp only during those pixels which have a known state (e.g. the dummy, or “black” pixels at the
start or end of a line on most image sensors). This is known as line-clamping and relies on the input
capacitor to hold the DC level between clamp intervals. In non-CDS mode (CDS=0) this can be done
directly by controlling the RSMP input pin to go high during the black pixels only. Note that internal
input voltage buffers should be enabled using the FOL_EN register bit when using this mode of
operation.
Alternatively it is possible to use RSMP to identify the black pixels and enable the clamp at the same
time as the input is being sampled (i.e. when VSMP is high and RSMP is high). This mode is enabled
by setting CLMPCTRL=1 and the operation is shown in Figure 15.
MCLK
VSMP
RSMP
RLC switch control,
"CLMP"
(RLCEN=1,CLMPCTRL=1)
RLC switch closed when RSMP=1 &&
VSMP=1 (during "black" pixels)
Video and reference sample
taken on fallling edge of VSMP
INPUT VIDEO
SIGNAL
unstable
reference level
dummy or
"black" pixel
video level
Figure 15 Reset Level Clamp Operation (CLMPCTRL=1), non-CDS mode only
RLCEN
CLAMPCTRL
OUTCOME
USE
0
X
RLC is not enabled. RLC switch is always open.
When input is DC coupled and within supply
rails.
1
0
RLC switch is controlled directly from RSMP input
pin:
RSMP=0: switch is open
RMSP=1: switch is closed
When ASIC explicitly provides a reset sample
signal and the input video waveform has a
suitable reset level.
1
1
VSMP applied as normal, RSMP is used to
indicate the location of black pixels
RLC switch is controlled by logical combination of
RSMP and VSMP:
RSMP && VSMP = 1: switch is closed
Switch is re-opened when:
VSMP=0 (non-CDS mode)
VSMP=0 and RSMP=0 (CDS mode)
When clamping during the video period of black
pixels or there is no stable per-pixel reference
level.
This method of operation is generally only
sensible in non-CDS mode.
Table 2 Reset Level Clamp Control Summary



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com