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WM8224 Datasheet(PDF) 39 Page - Cirrus Logic

Part # WM8224
Description  60MSPS 3-Channel AFE with Multiple Device Operation
PDF  50 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

WM8224 Datasheet(HTML) 39 Page - Cirrus Logic

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WM8224
Production Data
w
PD, Rev 4.2, September 2013
39
OPERATING MODES
Table 12 and Table 13 below show the normal operating modes of the device. The MCLK speed can
be changed along with the MCLK:VSMP ratio to achieve the desired sample rate.
16-BIT MODE
NUMBER
OF
CHANNELS
DESCRIPTION
CDS
AVAILABLE
MAXIMUM
SAMPLE
RATE
TIMING REQUIREMENTS
REGISTER
SETTINGS
9
3 Devices Used
YES
4.4 MSPS
MCLK max = 40MHz
Minimum MCLK:VSMP ratio = 9:1
MONO = 0
TWOCHAN = 0
AUTOZ=1
ACLKDIV = 00
Dev ID
OPDEL[3:0]
00
0000
01
0100
10
1000
6
2 Devices Used
YES
6.6 MSPS
MCLK max = 40MHz
Minimum MCLK:VSMP ratio = 6:1
MONO = 0
TWOCHAN = 0
AUTOZ=1
ACLKDIV = 00
Dev ID
OPDEL[3:0]
00
0000
01
0100
9
3 Devices Used
YES
6.6 MSPS
MCLK max = 60MHz
Minimum MCLK:VSMP ratio = 9:1
MONO = 0
TWOCHAN = 0
AUTOZ=1
ACLKDIV = 10
Dev ID
OPDEL[3:0]
00
0000
01
0100
10
1000
6
2 Devices Used
YES
10 MSPS
MCLK max = 60MHz
Minimum MCLK:VSMP ratio = 6:1
MONO = 0
TWOCHAN = 0
AUTOZ=1
ACLKDIV = 01
Dev ID
OPDEL[3:0]
00
0000
01
0100
3
Three channel
Pixel-by-Pixel
YES
13.33 MSPS
MCLK max = 40MHz
Minimum MCLK:VSMP ratio = 3:1
MONO = 0
TWOCHAN = 0
2
Two channel
Pixel-by-Pixel
YES
20 MSPS
MCLK max = 40MHz
Minimum MCLK:VSMP ratio = 2:1
MONO = 0
TWOCHAN = 1
1
One channel
Pixel-by-Pixel
YES
40 MSPS
MCLK max = 40MHz
Minimum MCLK:VSMP ratio = 1:1
MONO = 1
TWOCHAN = 0
Table 12 WM8224 16-bit Normal Operating Modes



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