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AD9249 Datasheet(PDF) 23 Page - Analog Devices

Part # AD9249
Description  16 Channel, 14-Bit, 65 MSPS, Serial LVDS, 1.8 V ADC
PDF  37 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9249 Datasheet(HTML) 23 Page - Analog Devices

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AD9249
Data Sheet
Rev. 0 | Page 22 of 36
Figure 48 shows an example of the LVDS output using the
ANSI-644 standard (default) data eye and a time interval error
(TIE) jitter histogram with trace lengths of less than 24 inches
on standard FR-4 material.
Figure 48. Data Eye for LVDS Outputs in ANSI-644 Mode with Trace Lengths
of Less Than 24 Inches on Standard FR-4 Material, External 100 Ω Far End
Termination Only
Figure 49 shows an example of trace lengths exceeding 24 inches
on standard FR-4 material. Note that the TIE jitter histogram
reflects the decrease of the data eye opening as the edge deviates
from the ideal position.
It is the responsibility of the user to determine if the waveforms
meet the timing budget of the design when the trace lengths
exceed 24 inches. Additional SPI options allow the user to further
increase the internal termination (increasing the current) of all 16
outputs to drive longer trace lengths, which can be achieved by
programming Register 0x15. Although this option produces
sharper rise and fall times on the data edges and is less prone to
bit errors, it also increases the power dissipation of the DRVDD
supply.
Figure 49. Data Eye for LVDS Outputs in ANSI-644 Mode with Trace Lengths of
Greater Than 24 Inches on Standard FR-4 Material, External 100 Ω Far End
Termination Only
The default format of the output data is twos complement. Table 10
shows an example of the output coding format. To change the
output data format to offset binary, see the Memory Map section.
Data from each ADC is serialized and provided on a separate
channel in DDR mode. The data rate for each serial stream is equal
to 14 bits times the sample clock rate, quantity divided by 2,
with a maximum of 455 Mbps (14 bits × 65 MSPS)/2 = 455 Mbps.
The lowest typical conversion rate is 10 MSPS. See the Memory
Map section for details on enabling this feature.
Table 10. Digital Output Coding
Input (V)
Condition (V)
Offset Binary Output Mode
Twos Complement Mode
VIN+ − VIN−
< −VREF − 0.5 LSB
00 0000 0000 0000
10 0000 0000 0000
VIN+ − VIN−
= −VREF
00 0000 0000 0000
10 0000 0000 0000
VIN+ − VIN−
= 0
10 0000 0000 0000
00 0000 0000 0000
VIN+ − VIN−
= +VREF − 1.0 LSB
11 1111 1111 1111
01 1111 1111 1111
VIN+ − VIN−
> +VREF − 0.5 LSB
11 1111 1111 1111
01 1111 1111 1111
0.5k
1.0k
1.5k
2.5k
2.0k
0
400
300
200
100
–400
–300
–200
–100
0
EYE: ALL BITS
ULS: 7000:400354
0.5k
1.0k
1.5k
2.5k
2.0k
0
300
200
100
–300
–200
–100
0
EYE: ALL BITS
ULS: 7000:18200



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