AD9689 datasheet(69/134 Pages) AD

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Data Sheet

AD9689

Rev. A | Page 69 of 134

SPORT OVER JESD204B

The signal monitor data can also be serialized and sent over the

JESD204B interface as control bits. These control bits must be

deserialized from the samples to reconstruct the statistical data.

The signal control monitor function is enabled by setting Bits[1:0]

of Register 0x0279 and Bit 1 of Register 0x027A. Figure 128 shows

two different example configurations for the signal monitor

control bit locations inside the JESD204B samples. A maximum

of three control bits can be inserted into the JESD204B samples;

however, only one control bit is required for the signal monitor.

Control bits are inserted from MSB to LSB.

If only one control bit is to be inserted (CS = 1), only the most

significant control bit is used (see Example Configuration 1 and

Example Configuration 2 in Figure 128). To select the SPORT

over JESD204B option, program Register 0x0559,

information on setting these registers.

Figure 129 shows the 25-bit frame data that encapsulates the

peak detector value. The frame data is transmitted MSB first

with five 5-bit subframes. Each subframe contains a start bit

that can be used by a receiver to validate the deserialized data.

Figure 130 shows the SPORT over JESD204B signal monitor

data with a monitor period timer set to 80 samples.

14-BIT CONVERTER RESOLUTION (N = 14)

TAIL

CONTROL

BIT

(CS = 1)

1-BIT

CONTROL

BIT

(CS = 1)

1 TAIL

BIT

SERIALIZED SIGNAL MONITOR

FRAME DATA

EXAMPLE

CONFIGURATION 1

(N' = 16, N = 15, CS = 1)

EXAMPLE

CONFIGURATION 2

(N' = 16, N = 14, CS = 1)

SERIALIZED SIGNAL MONITOR

FRAME DATA

16-BIT JESD204B SAMPLE SIZE (N' = 16)

S[13]

S[12]

S[11]

S[10]

S[9]

S[8]

S[7]

S[6]

S[5]

S[4]

S[3]

S[2]

S[1]

S[0]

CTRL

[BIT 2]

CTRL

[BIT 2]

S[14]

S[13]

S[12]

S[11]

S[10]

S[9]

S[8]

S[7]

S[6]

S[5]

S[4]

S[3]

S[2]

S[1]

S[0]

15-BIT CONVERTER RESOLUTION (N = 15)

16-BIT JESD204B SAMPLE SIZE (N' = 16)

Figure 128. Signal Monitor Control Bit Locations

25-BIT

FRAME

5-BIT IDLE

SUBFRAME

(OPTIONAL)

5-BIT IDENTIFIER

SUBFRAME

5-BIT DATA

MSB

SUBFRAME

5-BIT DATA

SUBFRAME

5-BIT DATA

SUBFRAME

5-BIT DATA

LSB

SUBFRAME

5-BIT SUBFRAMES

P[x] = PEAK MAGNITUDE VALUE

IDLE

START

P[0]

START

P[4]

P[3]

P[2]

P1]

START

P[8]

P[7]

P[6]

P5]

START

P[12]

P[11]

P[10]

P[9]

START

ID[3]

ID[2]

ID[1]

ID[0]

Figure 129. SPORT over JESD204B Signal Monitor Frame Data

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