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S71PL254 Datasheet(PDF) 102 Page - SPANSION |
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S71PL254 Datasheet(HTML) 102 Page - SPANSION |
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102 / 196 page  102 Type 2 pSRAM pSRAM_Type02_15A0 May 3, 2004 Advance I n f o rmation 16M pSRAM Notes: 1. Standby mode is supposed to be set up after at least one active operation after power up. ISB1 is measure after 60ms from the time when standby mode is set up. 32M pSRAM Notes: 1. Standby mode is supposed to be set up after at least one active operation after power up. ISB1 is measure after 60ms from the time when standby mode is set up. Item Symbol Test Conditions Min Typ Max Unit Average Operating Current ICC1 Cycle time=1µs, 100% duty, IIO=0mA, CS1#≤0.2V, LB#≤0.2V and/or UB#≤0.2V, CS2≥VCC-0.2V, VIN≤0.2V or VIN≥VCC-0.2V — — 7 mA ICC2 Async Cycle time=Min, IIO=0mA, 100% duty, CS1#=VIL, CS2=VIH LB#=VIL and/or UB#=VIL, VIN=VIH or VIL — — 30 mA Page Cycle time=tRC+3tPC, IIO=0mA, 100% duty, CS1#=VIL, CS2=VIH LB#=VIL and/or UB#=VIL, VIN-VIH or VIL 35 mA Standby Current (CMOS) ISB1 (Note 1) Other inputs=0-VCC 1. CS1# ≥ VCC - 0.2, CS2 ≥ VCC - 0.2V (CS1# controlled) or 2. 0V ≤ CS2 ≤ 0.2V (CS2 controlled) — — 80 mA Item Symbol Test Conditions Min Typ Max Unit Average Operating Current ICC1 Cycle time=1µs, 100% duty, IIO=0mA, CS1#≤0.2V, LB#≤0.2V and/or UB#≤0.2V, CS2≥VCC-0.2V, VIN≤0.2V or VIN≥VCC-0.2V — — 7 mA ICC2 Async Cycle time=Min, IIO=0mA, 100% duty, CS1#=VIL, CS2=VIH LB#=VIL and/or UB#=VIL, VIN=VIH or VIL — — 35 mA Page Cycle time=tRC+3tPC, IIO=0mA, 100% duty, CS1#=VIL, CS2=VIH LB#=VIL and/or UB#=VIL, VIN-VIH or VIL 40 mA Standby Current (CMOS) ISB1 (Note 1) Other inputs=0-VCC 1. CS1# ≥ VCC - 0.2, CS2 ≥ VCC - 0.2V (CS1# controlled) or 2. 0V ≤ CS2 ≤ 0.2V (CS2 controlled) — — 100 mA |
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