S71PL254 datasheet(134/196 Pages) SPANSION

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134

pSRAM Type 7

pSRAM_Type07_13_A1 November 2, 2004

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I n f o rmation

pSRAM Type 7

CMOS 1M/2M/4M-Word x 16-bit Fast Cycle Random Access Memory with Low

Power SRAM Interface

16Mb (1M word x 16-bit)

32Mb (2M word x 16-bit)

64Mb (4M word x 16-bit)

Features

Asynchronous SRAM Interface

Fast Access Time

— tCE = tAA = 60ns max (16M)

— tCE = tAA = 65ns max (32M/64M)

8 words Page Access Capability

— tPAA = 20ns max (32M/64M)

Low Voltage Operating Condition

— VDD = +2.7V to +3.1V

Wide Operating Temperature

— TA = -30°C to +85°C

Byte Control by LB and UB

Various Power Down modes

— Sleep (16M)

— Sleep, 4M-bit Partial, or 8M-bit Partial (32M)

— Sleep, 8M-bit Partial, or 16M-bit Partial (64M)

Pin Description

Pin Name

Description

A21 to A0

Address Input: A19 to A0 for 16M, A20 to A0 for 32M, A21 to A0 for 64M

CE1#

Chip Enable (Low Active)

CE2#

Chip Enable (High Active)

WE#

Write Enable (Low Active)

OE#

Output Enable (Low Active)

UB#

Upper Byte Control (Low Active)

LB#

Lower Byte Control (Low Active)

DQ16-9

Upper Byte Data Input/Output

DQ8-1

Lower Byte Data Input/Output

VDD

Power Supply

VSS

Ground

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