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S71PL254 Datasheet(PDF) 177 Page - SPANSION |
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S71PL254 Datasheet(HTML) 177 Page - SPANSION |
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177 / 196 page ![]() June 8, 2004 pSRAM_Type01_12_A0 pSRAM Type 1 177 Advance I n f o rmatio n twc Write cycle time 55 ns 70 ns tcw Chipselect to end of write 50 ns 55 ns tas Address set up Time 0ns 0ns taw Address valid to end of write 50 ns 55 ns tbw UB#, LB# valid to end of write 50 ns 55 ns twp Write pulse width 50 ns 55 ns twr Write recovery time 0ns 0ns twhz Write to output High-Z 25 ns 25 ns tdw Data to write time overlap 25 ns 25 ns tdh Data hold from write time 0ns 0ns tow End write to output Low-Z 55 tow Write high pulse width xx ns x x ns tpc Page read cycle x x tpa Page address access time xx twpc Page write cycle x x tcp Chip select high pulse width xx Asynchronous Performance Grade -55 -70 Density 16Mb pSRAM 16Mb pSRAM 3 Volt Symbol Parameter Min Max Units Min Max Units |
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