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S71PL254 Datasheet(PDF) 179 Page - SPANSION |
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S71PL254 Datasheet(HTML) 179 Page - SPANSION |
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179 / 196 page  June 8, 2004 pSRAM_Type01_12_A0 pSRAM Type 1 179 Advance I n f o rmatio n twc Write cycle time 60 20k ns 65 20k ns 70 20k ns tcw Chipselect to end of write 50 ns 60 ns 60 ns tas Address set up Time 0ns 0ns 0ns taw Address valid to end of write 50 ns 60 ns 60 ns tbw UB#, LB# valid to end of write 50 ns 60 ns 60 ns twp Write pulse width 50 ns 50ns 50ns twr Write recovery time 0ns 0ns 0ns twhz Write to output High-Z 5ns 5 ns 5ns tdw Data to write time overlap 20 ns 20 ns 20 ns tdh Data hold from write time 0ns 0ns 0ns tow End write to output Low-Z 55 5 tow Write high pulse width 7.5ns 7.5 ns 7.5ns tpc Page read cycle 25 20k ns 25 20k ns 25 20k ns tpa Page address access time 25 ns 25 ns 25 ns twpc Page write cycle 25 20k ns 25 20k ns 25 20k ns tcp Chip select high pulse width 10 ns 10 ns 10 ns Page Mode Performance Grade -60 -65 -70 Density 16Mb pSRAM 16Mb pSRAM 16Mb pSRAM 3 Volt Symbol Parameter Min Max Units Min Max Units Min Max Units |
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