80C286 datasheet(15/65 Pages) RENESAS

15 / 65 page

80C286

FN2947 Rev.3.00

Page 15 of 65

January 28, 2008

80C286 Real Address Mode

The 80C286 executes a fully upward-compatible superset of

the 80C86 instruction set in real address mode. In real address

mode the 80C286 is object code compatible with 80C86 and

80C88 software. The real address mode architecture (registers

and addressing modes) is exactly as described in the 80C286

Base Architecture section of this Functional Description.

Memory Size

Physical memory is a contiguous array of up to 1,048,576

bytes (one megabyte) addressed by pins A0 through A19 and

BHE. A20 through A23 should be ignored.

Memory Addressing

In real address mode physical memory is a contiguous array of

up to 1,048,576 bytes (one megabyte) addressed by pin A0

through A19 and BHE. Address bits A20-A23 may not always

be zero in real mode. A20-A23 should not be used by the sys-

tem while the 80C286 is operating in Real Mode.

The selector portion of a pointer is interpreted as the upper 16-

bits of a 20-bit segment address. The lower four bits of the 20-

bit segment address are always zero. Segment addresses,

therefore, begin on multiples of 16 bytes. See Figure 6 for a

graphic representation of address information.

All segments in real address mode are 64K bytes in size and

may be read, written, or executed. An exception or interrupt

can occur if data operands or instructions attempt to wrap

around the end of a segment (e.g. a word with its low order

byte at offset FFFF(H) and its high order byte at offset

0000(H)). If, in real address mode, the information contained in

a segment does not use the full 64K bytes, the unused end of

the segment may be overlaid by another segment to reduce

physical memory requirements.

TABLE 8. RECOMMENDED MSW ENCODINGS FOR PROCESSOR EXTENSION CONTROL

RECOMMENDED USE

INSTRUCTION

CAUSING

EXCEPTION 7

Initial encoding after RESET. 80C286 operation is identical to 80C86/88.

None

No processor extension is available. Software will emulate its function.

ESC

No processor extension is available. Software will emulate its function. The

current processor extension context may belong to another task.

ESC

A processor extension exists.

None

A processor extension exists. The current processor extension context may

belong to another task. The exception 7 on WAIT allows software to test for

an error pending from a previous processor extension operation.

ESC or WAIT

TABLE 9. REAL ADDRESS MODE ADDRESSING INTERRUPTS

FUNCTION

INTERRUPT

NUMBER

RELATED INSTRUCTIONS

RETURN ADDRESS

BEFORE INSTRUCTION

Interrupt table limit too small exception

INT vector is not within table limit

Yes

Processor extension segment overrun

interrupt

ESC with memory operand extending beyond offset

FFFF(H)

Segment overrun exception

Word memory reference with offset = FFFF(H) or an

attempt to execute past the end of a segment

Yes

0000

OFFSET

ADDRESS

0000

SEGMENT

SELECTOR

ADDER

20-BIT PHYSICAL

MEMORY ADDRESS

SEGMENT

ADDRESS

FIGURE 6. 80C286 REAL ADDRESS MODE ADDRESS

CALCULATION

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