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80C286 Datasheet(PDF) 25 Page - Renesas Technology Corp |
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80C286 Datasheet(HTML) 25 Page - Renesas Technology Corp |
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25 / 65 page  80C286 FN2947 Rev.3.00 Page 25 of 65 January 28, 2008 LIMIT BASE 0 15 23 0 CPU TASK REGISTER TYPE DESCRIPTION 1 An available task state segment. May be used as the destination of a task switch operation. 3 A busy task state segment. Can- not be used as the destination of a task switch. SYSTEM SEGMENT DESCRIPTOR TR RESERVED P D P L 0 TYPE BASE 15 - 0 LIMIT 15 - 0 BASE 23 - 16 TASK LDT SELECTOR DS SELECTOR SS SELECTOR CS SELECTOR ES SELECTOR DI SI BP SP BX DX CX AX FLAG WORD IP (ENTRY POINT) SS FOR CPL 2 SP FOR CPL 2 SS FOR CPL 1 SP FOR CPL 1 SS FOR CPL 0 SP FOR CPL 0 BACK LINK SELECTOR TO TSS 42 40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 0 CURRENT TASK STATE INITIAL STACKS FOR CPL 0, 1, 2 BYTE OFFSET TASK STATE SEGMENT PROGRAM INVISIBLE 15 0 15 0 P DESCRIPTION 1 Base and Limit fields are valid. 0 Segment is not present in mem- ory, Base and Limit are not de- fined. FIGURE 18. TASK STATE SEGMENT AND TSS REGISTERS |
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