Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

SCD1284 Datasheet(PDF) 126 Page - Intel Corporation

Part # SCD1284
Description  IEEE 1284-Compatible Parallel Interface Controller with Two High-Speed Asynchronous Serial Ports
PDF  176 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

SCD1284 Datasheet(HTML) 126 Page - Intel Corporation

Back Button SCD1284 Datasheet HTML 122Page - Intel Corporation SCD1284 Datasheet HTML 123Page - Intel Corporation SCD1284 Datasheet HTML 124Page - Intel Corporation SCD1284 Datasheet HTML 125Page - Intel Corporation SCD1284 Datasheet HTML 126Page - Intel Corporation SCD1284 Datasheet HTML 127Page - Intel Corporation SCD1284 Datasheet HTML 128Page - Intel Corporation SCD1284 Datasheet HTML 129Page - Intel Corporation SCD1284 Datasheet HTML 130Page - Intel Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 126 / 176 page
background image
CD1284 — IEEE 1284-Compatible Parallel Interface Controller
126
Datasheet
7.4.4
Channel Option Register 4
5
Flow Control Transparency: This bit enables/disables the transparent response to flow control characters
received by the CD1284. If set, received XON and XOFF characters are not placed in the FIFO for the host. If
in-band flow control is enabled, the characters are acted upon. If this bit is not set, flow control characters are
acted upon, placed in the receive FIFO, and the host is notified by a receive exception service request.
4
Enable Special Character Detect on SCHR2 and SCHR1: This bit controls whether or not the CD1284
compares received characters with the values stored in SCHR2 and SCHR1. ‘1’ enables compare. This bit
must be set to enable automatic in-band flow control.
3:0
Serial Receive FIFO Threshold
Register Name: COR4
Register Description: Channel Option Register 4
Access: Read/Write
8-Bit Hex Address: 1E
Default Value: 00
Bit 7Bit 6Bit 5Bit 4Bit 3
Bit 2Bit 1
Bit 0
IGNCR
ICRNL
INLCR
IGNBRK
−BRKINT
PEH[2]
PEH[1]
PEH[0]
Bit
Description
RxTh3
RxTh2
RxTh1
RxTh0
Receiver FIFO Threshold
0
0
0
0
Not used.
0
0
0
1
1 character
0
0
1
0
2 characters
••••
1
0
1
1
11 characters



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com