SCD1284 datasheet(129/176 Pages) INTEL

129 / 176 page

IEEE 1284-Compatible Parallel Interface Controller — CD1284

Datasheet

129

7.4.7

LNext Character Register

This register defines the LNext character. If the LNext function is enabled (COR5[6]), the CD1284

examines received characters and compare them against this value. If a match occurs, this character

and the following are placed in the FIFO without any special processing. In effect, the LNext

function causes the CD1284 to ignore characters with special meaning, such as flow-control

characters. There are two exceptions. If the character following the LNext character is either a

break or an error character, LNext is placed in the FIFO, and the following character are treated as

it normally would be for these error conditions.

7.5

Modem Change Option Registers

The CD1284 has two registers that control its response to changes on the modem input pins. It can

be programmed to respond to the low-to-high transition, the high-to-low transition or both. In

addition, the threshold at which the DTR signal is negated can be set by the DTRth3–DTRth0 bits

in MCOR1.

7.5.1

Modem Change Option Register 1

Access: Read/Write

8-Bit Hex Address: 24

Default Value: 00

Bit 7

Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0

LNext Character

Access: Read/Write

8-Bit Hex Address: 15

Default Value: 00

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

DSRzd

CTSzd

RIzd

CDzd

DTRth3

DTRth2

DTRth1

DTRth0

SCD1284 Datasheet(PDF) 129 Page - Intel Corporation

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