SCD1284 datasheet(133/176 Pages) INTEL

133 / 176 page

IEEE 1284-Compatible Parallel Interface Controller — CD1284

Datasheet

133

7.5.8

Receive Timeout Period Register

The RTPR determines the time period used for the NNDT (no new data timeout) and the ‘no new

data’ timeout. The timeout counter is loaded from this register whenever a new character is placed

in – or the last character is removed from – the receive FIFO. The counter decrements on each tick

of the prescaler counter (PPR). A service request is generated if the count reaches zero and:

• Either an NNDT if the FIFO is empty and the NNDT is enabled, or

• A Good Data service request is generated if there is data in the FIFO

In either case the timeout period has expired before the FIFO reaches the programmed threshold.

7.6

Special Character Registers

The four special character registers, SCHR1–SCHR4, contain the character patterns used for

various character matching and flow-control functions. Each 8-bit character is right justified, that

is, comparison occurs from right to left, and all bits are compared. Any unused bits must be ‘0’.

SCHR1 and SCHR2 serve the additional function of defining the XON and XOFF characters,

respectively, used for in-band flow control.

7.6.1

Special Character Register 1

SCHR1 defines the XON character.

7.6.2

Special Character Register 2

SCHR2 defines the XOFF character.

Access: Read/Write

8-Bit Hex Address: 21

Default Value: 00

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Binary Count Value

Access: Read/Write

8-Bit Hex Address: 1A

Default Value: 00

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Special Character 1

Access: Read/Write

8-Bit Hex Address: 1B

Default Value: 00

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Special Character 2

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