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56F8014 Datasheet(PDF) 41 Page - Freescale Semiconductor, Inc |
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56F8014 Datasheet(HTML) 41 Page - Freescale Semiconductor, Inc |
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41 / 124 page  Peripheral Memory Mapped Registers 56F8014 Technical Data, Rev. 3 Freescale Semiconductor 41 Preliminary Table 4-22 Flash Module Registers Address Map (FM_BASE = $00 F400) Register Acronym Address Offset Register Description FM_CLKDIV $0 Clock Divider Register FM_CNFG $1 Configuration Register $2 Reserved FM_SECHI $3 Security High Half Register FM_SECLO $4 Security Low Half Register $5 - $9 Reserved FM_PROT $10 Protection Register $11 - $12 Reserved FM_USTAT $13 User Status Register FM_CMD $14 Command Register $15 Reserved $16 Reserved $17 Reserved FM_DATA $18 Data Buffer Register $19 Reserved $1A Reserved FM_OPT1 $1B Optional Data 1 Register Reserved FM_TSTSIG $1D Test Array Signature Register |
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