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56F8014 Datasheet(PDF) 6 Page - Freescale Semiconductor, Inc |
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56F8014 Datasheet(HTML) 6 Page - Freescale Semiconductor, Inc |
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6 / 124 page ![]() 56F8014 Technical Data, Rev. 3 6 Freescale Semiconductor Preliminary •26 General Purpose I/O (GPIO) pins • Integrated Power-On Reset and Low-Voltage Interrupt Module • One Inter-Integrated Circuit (I2C) port • JTAG/Enhanced On-Chip Emulation (OnCE) for unobtrusive, processor speed-independent, real-time debugging • Fixed Phase Lock Loop (PLL) • On-chip relaxation oscillator 1.1.4 Energy Information • Fabricated in high-density CMOS with 5V-tolerant, TTL-compatible digital inputs • On-chip regulators for digital and analog circuitry to lower cost and reduce noise • Wait and Stop modes available • ADC smart power management • Each peripheral can be individually disabled to save power 1.2 56F8014 Description The 56F8014 is a member of the 56800E core-based family of Digital Signal Controllers (DSCs). It combines, on a single chip, the processing power of a DSP and the functionality of a microcontroller with a flexible set of peripherals to create an extremely cost-effective solution. Because of its low cost, configuration flexibility, and compact program code, the 56F8014 is well-suited for many applications. The 56F8014 includes many peripherals that are especially useful for industrial control, motion control, home appliances, general purpose inverters, smart sensors, fire and security systems, power management, and medical monitoring applications. The 56800E core is based on a Harvard-style architecture consisting of three execution units operating in parallel, allowing as many as six operations per instruction cycle. The MCU-style programming model and optimized instruction set allow straightforward generation of efficient, compact DSP and control code. The instruction set is also highly efficient for C compilers to enable rapid development of optimized control applications. The 56F8014 supports program execution from internal memories. Two data operands can be accessed from the on-chip data RAM per instruction cycle. The 56F8014 also offers up to 26 General Purpose Input/Output (GPIO) lines, depending on peripheral configuration. The 56F8014 Digital Signal Controller includes 16KB of Program Flash and 4KB of Unified Data/Program RAM. Program Flash memory can be independently bulk erased or erased in pages. Program Flash page erase size is 512 Bytes/256 Words. A key application-specific feature of the 56F8014 is the inclusion of one Pulse Width Modulator (PWM) module. This module incorporates three complementary, individually programmable PWM signal output pairs and is also capable of supporting five independent PWM functions to enhance motor control functionality. Complementary operation permits programmable dead time insertion, and separate top and bottom output polarity control. The up-counter value is programmable to support a continuously variable |
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