D17133CS datasheet(112/289 Pages) NEC

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CHAPTER 11

ARITHMETIC AND LOGIC UNIT

Table 11-4. Logical Operations

Logical

Logical OR

General register and data memory OR r, m

operation

Data memory and immediate data

OR m, #n4

Logical AND

General register and data memory AND r, m

Data memory and immediate data

AND m, #n4

Logical XOR

General register and data memory XOR r, m

Data memory and immediate data

XOR m, #n4

Table 11-5. Table of True Values for Logical Operations

Logical AND

Logical OR

Logical XOR

C=A AND B

C=A OR B

C=A XOR B

111111110

11.5 BIT JUDGEMENT

As shown in Table 11-6, there are both TRUE (1) and FALSE (0) bit judgement instructions.

The SKT instruction skips the next instruction when a bit is judged as TRUE (1) and the SKF instruction skips the

next instruction when a bit is judged as FALSE (0).

The SKT and SKF instructions can only be used with data memory.

Bit judgement are not affected by the BCD flag in the program status word (PSWORD) and bit judgements do

not cause either the CY or Z flag in the program status word (PSWORD) to be set. However, when an SKT or SKF

instruction is executed, the CMP flag is reset (0). When the index enable flag (IXE) is set (1), index modification is

performed using the index register. For information concerning index modification using the index register, refer

to CHAPTER 7 SYSTEM REGISTER (SYS REG).

11.5.1 and 11.5.2 explain TRUE (1) and FALSE (0) bit judgements.

Table 11-6. Bit Judgement Instructions

Bit judgement

TRUE (1) bit judgement

SKT m, #n

FALSE (0) bit judgement

SKF m, #n

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