LT7101 datasheet(32/38 Pages) AD

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LT7101

Rev. 0

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APPLICATIONS INFORMATION

nominally 410mΩ yielding an equivalent power MOSFET

resistance RSW of:

RSW = (760mΩ)(0.1) + (410mΩ)(0.9) = 445mΩ

From the previous section, the I2R losses are (12)(0.445)

= 445mW. INTVCC power dissipation is:

PLDO = 3.5mA+1nC 4+

⎛

⎝⎜

⎞

⎠⎟ •500k

⎡

⎣⎢

⎤

⎦⎥

•5

= 32mW

The transition losses are approximately:

(47pF) • 632 • (1 + 1.3) • 500kHz = 215mW

so the total power dissipation is approximately 0.69W.

The QFN 5mm × 6mm package junction-to-ambient ther-

mal resistance, qJA, is approximately 38°C/W. Therefore,

the junction temperature of the regulator operating in a

70°C ambient temperature is approximately:

TJ = 0.69W • 38°C/W + 70°C = 96°C

which is below the maximum junction temperature

of 150°C.

Design Example

As a design example, consider the LT7101 in an appli-

cation with the following specifications: VIN = 36V to

72V, VOUT = 12V, IOUT(MAX) = 1A, IOUT(MIN) = 20mA, and

switching is enabled between 30V and 90V on VIN.

First, because efficiency is important at both high and low

load currents, Burst Mode operation at 500kHz is chosen.

The RFREQ resistor for 500kHz switching frequency is cal-

culated using RFREQ = f/40 + 7.5k = 20k. In addition, the

PLLIN/MODE pin is tied to ground to select Burst Mode

operation.

Next, since the output voltage is available as a prepro-

grammed value (VPRG1 = INTVCC and VPRG2 = OPEN),

the RIND pin is left floating, and the inductor value chosen

according to Table 3 as 63μH. Suitable inductors with a

nominal value of 68μH and ISAT ≥ 1.8A are available from

multiple manufacturers, so a value of L = 68μH is chosen.

Next, COUT = 10μF is selected based on the minimum

needed for internal voltage loop compensation and out-

put ripple. CIN is sized to handle a ripple current IRMS =

IOUT/2 = 0.5A. A low ESR, 100V, 4.7μF ceramic capacitor

is chosen. The INTVCC decoupling capacitor is chosen as

1μF and the BOOST capacitor is chosen as 0.1μF. EXTVCC

is tied to VOUT to minimize loss in the INTVCC LDO.

The undervoltage and overvoltage lockout requirements

on VIN can be satisfied with a resistor divider from VIN

to the RUN and OVLO pins (refer to Figure 8). Choose

R3+R4+R5 = 2.5MΩ to minimize the loading on VIN.

Calculate R3, R4 and R5 as follows:

R5 =

1.21V • 2.5MΩ

90V

= 33.6k

R4 =

1.21V • 2.5MΩ

30V

– R5 = 67.2k

R3 = 2.5MΩ – R5 – R4 = 2.4MΩ

Figure 12.

7101 F12

VFB

EXTVCC

PLLIN/MODE

BOOST

VIN

RUN

2.2M

4.7µF

VOUT

12V

VIN

36V TO 72V

62k

20k

30.9k

OVLO

VPRG1

ITH

LT7101

FREQ

INTVCC

PGND

SGND

0.1µF

1µF

10µF

68µH

36V to 72V Input to 12V Output, 1A Regulator

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