LT7101 datasheet(13/38 Pages) AD

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LT7101

Rev. 0

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MOSFET. These pins also supply bias voltage for an internal

LDO regulator (the VIN LDO) that generates 3.5V at INTVCC.

The voltage on INTVCC in turn is used for internal chip bias

as well as gate drive for the bottom power MOSFETs. The

gate drive for the top power MOSFET is supplied by a float-

ing supply (CBST) between the BOOST and SW pins, which

is charged by an internal synchronous diode from INTVCC.

In addition, an internal charge pump allows for 100% duty

cycle operation by maintaining the BOOST to SW voltage

when the top MOSFET is on continuously.

To improve efficiency and limit power dissipation in the

VIN LDO regulator, a second LDO regulator (the EXTVCC

LDO) allows the INTVCC voltage to be derived from the

lower-voltage EXTVCC pin. In most applications, the

EXTVCC pin is simply tied directly to the regulated output

voltage of the DC/DC converter to enable operation in a

high efficiency, bootstrapped configuration. In order to

ensure that the power dissipation on the internal VIN LDO

is limited to a safe level, the LT7101 incorporates a special

regulator timeout feature into the soft-start pin.

Start-Up and Shutdown (RUN, SS, OVLO Pins)

When the RUN pin is below 0.7V, the LT7101 enters a low

current shutdown state, reducing the DC supply current to

0.7µA. When the RUN pin is above 0.7V and the VIN pin is

above than the internal undervoltage threshold (VIN(UVLO))

of 4.55V, the INTVCC LDO regulators are enabled. However,

switching is inhibited until the RUN pin is greater than

VRUN(ON) = 1.21V. This allows the RUN pin to be used to

implement a VIN undervoltage lockout function so that the

power supply will not operate below a user-adjustable level.

In addition, switching is also inhibited if the voltage on

the OVLO pin exceeds VOV(R) = 1.21V. This feature can be

used to implement an input overvoltage lockout function

to prevent power supply operation during an overvoltage

condition on the input supply.

When appropriate voltages are present on the VIN, RUN

and OVLO pins, the LT7101 will begin switching and ini-

tiate a soft-start ramp of the output voltage. An internal

soft-start ramp of 1.2ms will limit the ramp rate of the

output voltage to prevent excessive input current dur-

ing start-up. If a longer ramp time is desired, a capacitor

can be placed from the SS pin to ground. The 10μA cur-

rent that is sourced from the SS pin will create a smooth

voltage ramp on the capacitor. If this external ramp rate

is slower than the internal 1.2ms soft-start, then the out-

put voltage will be limited by the ramp rate on the SS

pin instead. Once both the external and internal soft-start

ramps have exceeded 1V, the output voltage will be in

regulation. The internal and external soft-start functions

are reset during initial start-up and after an undervoltage

or overvoltage condition on the input supply.

The soft-start pin is also used to implement a regulator

timeout feature. This feature limits die temperature rise

due to power dissipation in the internal VIN LDO regulator

by disabling the top and bottom power MOSFETs after a

timeout, if EXTVCC voltage is not present. This is useful,

for example, if EXTVCC is tied to the output of the DC/DC

converter, but the converter output gets shorted to ground.

During start-up, a regulator timeout begins after both the

internal and external soft-start ramps have exceeded 1V,

and EXTVCC < 3V. If this condition persists for a period of

time (approximately 1.4 times the normal soft-start time),

then a regulator timeout fault occurs and all switching

stops. After a long restart delay (approximately 46 times

the normal soft-start time), a restart is initiated. If the

regulator timeout feature is not needed, the SS pin should

be tied to INTVCC through a 75k resistor. See Soft-Start

and LDO Regulator Timeout in the Applications Section

for more information.

Output Voltage Programming (VPRG1, VPRG2, VFB Pins)

The VPRG1 and VPRG2 pins provide a great deal of flex-

ibility in programming the output voltage of the power

supply. Floating both pins selects adjustable VOUT mode.

In this mode, the output is programmed using external

resistors on the VFB pin, and the VFB voltage is regu-

lated to the 1V reference. If one of the pins is tied either

to SGND or INTVCC, then fixed output voltage mode is

selected. In this mode, precision internal resistor dividers

are used to program the output voltage to one of eight

fixed voltage levels. See Output Voltage Programming in

the Applications Information Section.

Inductor Current Replication (RIND Pin)

The LT7101 contains a unique circuit that replicates the

inductor current immediately after the top switch turn-

on and combines this with the sensed switch currents

OPERATION

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