A29DL323 datasheet(22/50 Pages) AMICC

22 / 50 page

A29DL32x Series

PRELIMINARY (May, 2005, Version 0.0)

AMIC Technology, Corp.

COMMAND DEFINITIONS

Writing specific address and data commands or sequences

into the command register initiates device operations. Table

12 defines the valid register command sequences. Writing

incorrect address and data values or writing them in the

improper sequence may place the device in an unknown

state. A reset command is then required to return the device

to reading array data.

All addresses are latched on the falling edge of WE or

CE ,

whichever happens later. All data is latched on the rising

edge of WE or

CE , whichever happens first. Refer to the

AC Characteristics section for timing diagrams.

Reading Array Data

The device is automatically set to reading array data after

device power-up. No commands are required to retrieve

data. The device is also ready to read array data after

completing an Embedded Program or Embedded Erase

algorithm.

After the device accepts an Erase Suspend command, the

corresponding bank enters the erase-suspend-read mode,

after which the system can read data from any non-erase-

suspended sector within the same bank. After completing a

programming operation in the Erase Suspend mode, the

system may once again read array data with the same

exception.

See

the

Erase

Suspend/Erase

Resume

Commands section for more information.

The system must issue the reset command to return a bank

to the read (or erase-suspend-read) mode if I/O5 goes high

during an active program or erase operation, or if the bank is

in the autoselect mode. See the next section, Reset

Command, for more information.

See also Requirements for Reading Array Data in the Device

Bus Operations section for more information. The Read-Only

Operations table provides the read parameters, and Figure

11 shows the timing diagram.

Reset Command

Writing the reset command resets the banks to the read or

erase-suspend-read mode. Address bits are don’t cares for

this command.

The reset command may be written between the sequence

cycles in an erase command sequence before erasing

begins. This resets the bank to which the system was writing

to reading array data. Once erasure begins, however, the

device ignores reset commands until the operation is

complete.

The reset command may be written between the sequence

cycles

program

command

sequence

before

programming begins. This resets the bank to which the

system was writing to reading array data. If the program

command sequence is written to a bank that is in the Erase

Suspend mode, writing the reset command returns that bank

to the erase-suspend-read mode. Once programming begins,

however, the device ignores reset commands until the

operation is complete.

The reset command may be written between the sequence

cycles in an autoselect command sequence. Once in the

autoselect mode, the reset command must be written to

return to reading array data. If a bank entered the autoselect

mode while in the Erase Suspend mode, writing the reset

command returns that bank to the erase-suspend-read mode.

If I/O5 goes high during a program or erase operation, writing

the reset command returns the banks to reading array data

(or erase-suspend-read mode if that bank was in Erase

Suspend).

Autoselect Command Sequence

The autoselect command sequence allows the host system

to access the manufacturer and device codes, and determine

whether or not a sector is protected. Table 12 shows the

address

and

data

requirements.

This

method

alternative to that shown in Table 5, which is intended for

PROM programmers and requires VID on address pin A9.

The autoselect command sequence may be written to an

address wit h in a bank that is either in t he read or erase-

suspend-read mode. The autoselect command may not be

written while the device is actively programming or erasing in

the other bank.

The autoselect command sequence is initiated by first writing

two unlock cycles. This is followed by a third write cycle that

contains the bank address and the autoselect command. T he

bank then enter s the autoselect mode. The system may read

at any address within the same bank any number of times

without initiating another autoselect command sequence:

A read cycle at address (BA)XX00h (where BA is the bank

address) returns the manufacturer code.

A read cycle at address (BA)XX01h in word mode (or

(BA)XX02h in byte mode) returns the device code.

A read cycle to an address containing a sector address

(SA) within the same bank, and the address 02h on A7-A0

in word mode (or the address 04h on A6-A-1 in byte mode)

returns 01h if the sector is protected, or 00h if it is

unprotected.

(Refer

Tables

3-4

for

valid

sector

addresses).

The system must write the reset command to return to

reading array data (or erase-suspend-read mode if the bank

was previously in Erase Suspend).

Byte/Word Program Command Sequence

The system may program the device by word or byte,

depending on the state of the

BYTE pin. Programming is a

four-bus-cycle operation. The program command sequence

is initiated by writing two unlock write cycles, followed by the

program set-up command. The program address and data

are written next, which in turn initiate the Embedded Program

algorithm. The system is not required to provide further

controls or timings. The device automatically provides

internally

generated

program

pulses

and

verifies

the

programmed cell margin. Table 12 shows the address and

data requirements for the byte program command sequence.

When the Embedded Program algorithm is complete, that

bank then returns to reading array data and addresses are

no longer latched. The system can determine the status of

the program operation by using I/O7, I/O6, or RY/

BY . Refer

to the Write Operation Status section for information on these

status bits.

Any commands written to the device during the Embedded

Program Algorithm are ignored. Note that a hardware reset

immediately terminates the program operation. The program

command sequence should be reinitiated once that bank has

returned to reading array data, to ensure data integrity.

Programming is allowed in any sequence and across sector

boundaries. A bit cannot be programmed from “0” back to a

“1.” Attempting to do so may cause that bank to set I/O5 = 1,

or cause the I/O7 and I/O6 status bits to indicate the operation

was successful. However, a succeeding read will show that

the data is still “0.” Only erase operations can convert a “0” to

a “1.”

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