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RT3050 Datasheet(PDF) 97 Page - List of Unclassifed Manufacturers

Part # RT3050
Description  Dual Band Concurrent Router
PDF  235 Pages
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Manufacturer  ETC1 [List of Unclassifed Manufacturers]
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RT3050 Datasheet(HTML) 97 Page - List of Unclassifed Manufacturers

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RT3050/52
Datasheet
Preliminary
Revision August 14, 2008
DSR3050/52_V.2.0_081408
-97-
Form No.:QS-073-F02
Rev.:1
Kept by: DCC
Ret. T ime: 5 Years
Read to get the raw interrupt status
9
R/W
TX_DO NE_INT1
Tx queue#1 packet transmit interrupt
Write 1 to clear the interrupt.
Read to get the raw interrupt status
1’b0
8
R/W
TX_DO NE_INT0
Tx queue#0 packet transmit interrupt
Write 1 to clear the interrupt.
Read to get the raw interrupt status
1’b0
7:3
-
-
Reserved
5’b0
2
R/W
RX_DONE_INT0
Packet receive interrupt.
Write 1 to clear the interrupt.
Read to get the raw interrupt status
1’b0
1
R/W
TX_DLY_INT
Delayed version of TX_DONE_INT0 and TX_DONE_INT1. Write 1
to clear the interrupt.
Read to get the raw interrupt status
1’b0
0
R/W
RX_DLY_INT
Delayed version of RX_DONE_INT0.
Write 1 to clear the interrupt.
Read to get the raw interrupt status
1’b0
FE_INT_ENABLE: Frame Engine Interrupt Enable (offset: 0x14)
Bits
Type
Name
Description
Initial value
31
R/W
CNT_PPE_AF
PPE Counter Table Almost Full
1 : Enable the interrupt
0 : Disable the interrupt
1’b0
30
-
-
Reserved
1’b0
29
R/W
CNT_GDM_AF
GDMA 1 & 2 Counter Table Almost Full
Write 1 to clear the interrupt.
Read to get the raw interrupt status
1’b0
28:27 -
-
Reserved
2’b0
26
R/W
PSE_P2_FC
PSE port2 (GDMA2) flow control asserted.
1 : Enable the interrupt
0 : Disable the interrupt
1’b0
25
-
-
Reserved
1’b0
24
R/W
PSE_BUF_DROP
PSE discards a packet due to buffer sharing limitation (flow
control)
1 : Enable the interrupt
0 : Disable the interrupt
1’b0
23
R/W
GDM_OTHER_
DROP
GDMA 1 & 2 discard a packet due to other reason (e.g. too
short, too long, FIFO overflow, checksum error,.., etc.)
1 : Enable the interrupt
0 : Disable the interrupt
1’b0
22
R/W
PSE_P1_FC
PSE port1 (GDMA1) flow control asserted.
1 : Enable the interrupt
0 : Disable the interrupt
1’b0
21
R/W
PSE_P0_FC
PSE port0 (CDMA) flow control asserted.
1 : Enable the interrupt
0 : Disable the interrupt
1’b0
20
R/W
PSE_FQ_EMPTY
PSE free Q empty threshold reached & forced drop condition
occurred.
1 : Enable the interrupt
0 : Disable the interrupt
1’b0
19-18 -
-
Reserved
2’b0
17
R/W
TX_COHERENT
TX_DMA finds data coherent event when checking ddone bit.
1 : Enable the interrupt
0 : Disable the interrupt
1’b0



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