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RT3050 Datasheet(PDF) 29 Page - List of Unclassifed Manufacturers |
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RT3050 Datasheet(HTML) 29 Page - List of Unclassifed Manufacturers |
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29 / 235 page ![]() RT3050/52 Datasheet Preliminary Revision August 14, 2008 DSR3050/52_V.2.0_081408 -29- Form No.:QS-073-F02 Rev.:1 Kept by: DCC Ret. T ime: 5 Years 3.2 Memory Map Summary Start End Size Description 0000.0000 - 03FF.FFFF 64M SDRAM 0400.0000 - 0FFF.FFFF <<Reserved>> 1000.0000 - 1000.00FF 256 SYSCTL 1000.0100 - 1000.01FF 256 TIMER 1000.0200 - 1000.02FF 256 INTCTL 1000.0300 - 1000.03FF 256 MEM_CTRL (SDRAM & Flash/SRAM) 1000.0400 - 1000.04FF 256 PCM 1000.0500 - 1000.05FF 256 UART 1000.0600 - 1000.06FF 256 PIO 1000.0700 - 1000.07FF 256 Generic DMA 1000.0800 - 1000.08FF 256 NAND Flash Controller 1000.0900 - 1000.09FF 256 I2C 1000.0A00 - 1000.0AFF 256 I2S 1000.0B00 - 1000.0BFF 256 SPI 1000.0C00 - 1000.0CFF 256 UARTLITE 1000.0D00 - 100F.FFFF <<Reserved>> 1010.0000 - 1010.FFFF 64K Frame Engine 1011.0000 - 1011.7FFF 32K Ethernet Switch 1011.8000 1011.9FFF 8K ROM 1011_a000 1011_FFFF <<Reserved>> 1012.0000 - 1012.7FFF 32K <<Reserved>> 1012.8000 1012.FFFF 32K <<Reserved>> 1013.0000 - 1013.7FFF 32K <<Reserved>> 1013.8000 - 1013.FFFF 32K <<Reserved>> 1014.0000 - 1017.FFFF 256K <<Reserved>> 1018.0000 - 101B.FFFF 256K 802.11n MAC/BBP 101C.0000 - 101F.FFFF 256K USB OTG 1020.0000 - 1AFF.FFFF <<Reserved>> 1B00.0000 - 1BFF.FFFF 16MB External SRAM/Flash 1C00.0000 - 1EFF.FFFF <<Reserved>> 1F00.0000 - 1FFF.FFFF 16MB(flash) or 4KB(ram) or 8KB(rom) When BOOT_FROM = 2’b00, up-to 16MB ex ternal 16-bit flash is mapped. When BOOT_FROM = 2’b01, up-to 8MB external 8-bit flash is mapped. When BOOT_FROM = 2’b10, 4KB internal boot RAM is mapped for boot from NAND application. When BOOT_FROM = 2’b11, 8KB internal boot ROM is mapped for iNIC application. Note : When boot from NAND option is enabled (set boot strapping signal: BOOT_FRO M = 2’b10), the accessing to the external flash will be remapped to the i nternal 4KB boot SRAM located in USB OTG (0x101E_0000 – 0x101E_3FFF). Accesses to original flash memory region outside of the 4KB boot SRAM are invalid in this boot from NAND mode. The 4KB SRAM is also accessible from 0x101E_0000 – 0x101E_3FFF memory space. |
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