M263 datasheet(274/398 Pages) NUVOTON

274 / 398 page

M261/M262/M263

Mar 25, 2020

Page 274 of 398

Rev 1.02

LDROM. User can set the SYSRESETREQ(AIRCR[2]) to 1 to assert the System Reset.

6.2.3

Power Modes and Wake-up Sources

The NuMicro

® M261/M262/M263 series has power manager unit to support several operating modes

for saving power. Table 6.2-2 lists all power modes in the NuMicro

® M261/M262/M263 series.

Mode

CPU Operating Maximum

Speed

(MHz)

LDO_CAP

(V)

Clock Disable

Normal mode

48MHz

1.20

All clocks are disabled by control register.

CLK_AHBCLK,

CLK_APBCLK0

and

CLK_APBCLK1.

Turbo mode

64MHz

1.26

All clocks are disabled by control register.

CLK_AHBCLK,

CLK_APBCLK0

and

CLK_APBCLK1.

Idle mode

CPU enter Sleep mode

keep

Only CPU clock is disabled.

Power-down mode (PD)

CPU enters Deep Sleep mode

keep

Most clocks are disabled except LIRC/LXT, and

only RTC/WDT/Timer/UART peripheral clocks

still enable if their clock sources are selected as

LIRC/LXT.

Fast

Wake-up

Power-down

mode (FWPD)

CPU enters Deep Sleep mode

keep

Most clocks are disabled except LIRC/LXT, and

only RTC/WDT/Timer/UART peripheral clocks

still enable if their clock sources are selected as

LIRC/LXT.

Low

leakage

Power-down

mode

(LLPD)

CPU enters Deep Sleep mode

0.9

Most clocks are disabled except LIRC/LXT, and

only RTC/WDT/Timer/UART peripheral clocks

still enable if their clock sources are selected as

LIRC/LXT.

Ultra Low leakage Power-down

mode

(ULLPD)

CPU enters Deep Sleep mode

0.8

Most clocks are disabled except LIRC/LXT, and

only RTC/WDT/Timer/UART peripheral clocks

still enable if their clock sources are selected as

LIRC/LXT.

Standby Power-down mode

(SPD)

Power off

Floating

Only LIRC/LXT still enable for RTC function and

wake-up timer usage.

Deep Power-down mode

(DPD)

Power off

Floating

Only LIRC/LXT still enable for RTC function and

wake-up timer usage.

Table 6.2-2 Power Mode Table

Each power mode has different entry setting and leaving condition. Table 6.2-3 shows the entry

setting for each power mode. When chip power-on, chip is running in normal mode. User can enter

each

mode

setting

SLEEPDEEP

(SCR[2]),

PDEN

(CLK_PWRCT[7])

and

PDMSEL

(CLK_PMUCTL[2:0]) and execute WFI instruction.

Mode

SLEEPDEEP

(SCR[2])

PDEN

(CLK_PWRCTL[7])

PDMSEL

(CLK_PMUCTL[2:0])

CPU Run WFI Instruction

Normal mode

Idle mode

YES

Power-down mode

YES

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