M263 datasheet(271/398 Pages) NUVOTON

271 / 398 page

M261/M262/M263

Mar 25, 2020

Page 271 of 398

Rev 1.02

Other Peripheral

Registers

Reset Value

FMC Registers

Reset Value

Note: ‘-‘ means that the value of register keeps original setting.

Table 6.2-1 Reset Value of Registers

6.2.2.1

nRESET Reset

The nRESET reset means to generate a reset signal by pulling low nRESET pin, which is an

asynchronous reset input pin and can be used to reset system at any time. When the nRESET voltage

is lower than 0.2 VDD and the state keeps longer than 32 us (glitch filter), chip will be reset. The

nRESET reset will control the chip in reset state until the nRESET voltage rises above 0.7 VDD and the

state keeps longer than 32 us (glitch filter). The PINRF(SYS_RSTSTS[1]) will be set to 1 if the

previous reset source is nRESET reset. Figure 6.2-2 shows the nRESET reset waveform.

nRESET

0.2 VDD

0.7 VDD

nRESET Reset

32 us

Figure 6.2-2 nRESET Reset Waveform

6.2.2.2

Power-on Reset (POR)

The Power-on reset (POR) is used to generate a stable system reset signal and forces the system to

be reset when power-on to avoid unexpected behavior of MCU. When applying the power to MCU, the

POR module will detect the rising voltage and generate reset signal to system until the voltage is

ready for MCU operation. At POR reset, the PORF(SYS_RSTSTS[0]) will be set to 1 to indicate there

is a POR reset event. The PORF(SYS_RSTSTS[0]) bit can be cleared by writing 1 to it. Figure 6.2-3

shows the power-on reset waveform.

VDD

VPOR

Power-on

Reset

0.1V

Figure 6.2-3 Power-on Reset (POR) Waveform

M263 Datasheet(PDF) 271 Page - Nuvoton Technology Corporation