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F159V Datasheet(PDF) 45 Page - Renesas Technology Corp

Part # F159V
Description  Dual-Path RF Transmitter IC 450MHz to 2800MHz
PDF  78 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

F159V Datasheet(HTML) 45 Page - Renesas Technology Corp

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© 2020 Renesas Electronics Corporation
45
May 15, 2020
F159V Datasheet
Table 27. Digital Step Attenuator Truth Table
DSA[4]
DSA[3]
DSA[2]
DSA[1]
DSA[0]
Attenuator
Setting (dB)
LOW
LOW
LOW
LOW
LOW
0
LOW
LOW
LOW
LOW
HIGH
1
LOW
LOW
LOW
HIGH
LOW
2
LOW
LOW
HIGH
LOW
LOW
4
LOW
HIGH
LOW
LOW
LOW
8
HIGH
LOW
LOW
LOW
LOW
16
HIGH
HIGH
HIGH
HIGH
HIGH
31
Table 28. Voltage Variable Attenuator Setting
Name
Register
Description
Register Name
Function
VVA0
29
30
Voltage setting for
VVA in Path 0
DAC0_0
DAC0_1
This is a 12-bit control word that sets the attenuation
setting for the VVA in Channel 0.
DAC0_0 is the lower 8 bits.
DAC0_1 is the upper 4 bits.
The default value is 2047 = 0111_1111_1111b.
DSA1
31
32
Voltage setting for
VVA in Path 1
DAC1_0
DAC1_1
This is a 12-bit control word that sets the attenuation
setting for the VVA in Channel 1.
DAC1_0 is the lower 8 bits.
DAC1_1 has the upper 4 bits.
The default value is 2047 = 0111_1111_1111b.
23.4. General Settings
23.4.1.
Initial Startup
When the F159V is initially powered up, power is applied to all the VDD pins, or the RESET pin is set to logic LOW, the device is placed in the
following state:
Default logic is 1.8V.
The reference frequency doubler is enabled.
The PLL is set for integer mode with a divider of 63.
The LO signal used for the modulator is set for half the frequency of the PLL frequency and 0dBm.
The LO is set for the 1.50GHz to 2.00GHz range.
The internal LO signal is used for the modulator.
The PLL is enabled.
Digital step attenuators are set for the minimum attenuation (0dB).
Voltage variable attenuators are set for the minimum attenuation (state 2047) and the DAC used to control them is turned on.



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