LT3477 datasheet(11/26 Pages) AD

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LT3950

Rev. 0

For more information www.analog.com

OPERATION

LT3950 is a constant-frequency, constant-current, con-

stant voltage (CC/CV) power supply with integrated low

side NMOS switch that can be configured as a boost,

SEPIC, buck mode or buck-boost mode LED driver. The

operation of the part can be best understood by looking at

the block diagram. At the beginning of every clock cycle,

the clock signal sets an SR latch controlling the switch

driver. The switch turns on and connects the inductor

to ground. The positive voltage drop across the induc-

tor results in linearly increasing current in the inductor.

The switch will remain on until the current comparator

near the SR latch resets it. This reset will occur when the

switch current exceeds the internal demand current. This

demand current is determined by the error amplifier. The

external LED current sense resistor used to program load

current drives the error amplifier. The voltage drop across

the sense resistor multiplied by the amplifier’s transcon-

ductance establishes the demand current.

With no induced offset, the error amplifier would regulate

the load to zero current based on the voltage across the

LED current sense resistor. To establish the positive offset

in the error amplifier needed to program the LED cur-

rent, a small current is intentionally pulled from only one

input of the amplifier through a series resistor. The CTRL

pin establishes this offset current by varying the voltage

dropped across a resistor to ground. These two resistors

are internal to the IC. Changing the CTRL pin voltage will

vary the LED current sense resistor regulation voltage

between true zero and 250mV.

During constant current operation the FB pin provides

overvoltage protection. While the FB pin voltage is below

its regulation threshold, the FB amplifier has little effect

on demand current. However, as the FB pin voltage

approaches VFB, the FB amplifier has an increasingly pro-

nounced effect, until eventually it dominates the demand

current. When the FB pin voltage exceeds the regulation

threshold by 100mV (typ.) the FAULT pin is asserted to

indicate an overvoltage event. Similarly, if the voltage at

the FB pin ever falls below 300mV (typ.) (excluding start-

up) then the FAULT pin is asserted to signal a shorted

LED event.

In addition to regulating load current, the LED current

sense amplifier also provides a digital indication of

whether the load current is above or below 10% of the

programmed full-scale value. If the load current drops

below 10% of full-scale while the FB pin voltage is in

regulation, the FAULT pin is asserted to indicate an Open

LED event.

Fast overcurrent protection relies on a separate signal path

than the main current sense amplifier. If the sense resis-

tor voltage (VISP–VISN) exceeds 700mV (typ.), switching

stops and the FAULT pin is asserted to indicate an overcur-

rent event. This event, along with Short LED, also triggers

a brief interruption of switching while soft-start is reset,

followed by a soft start of the switching.

Three different methods for dimming the LED load are

provided with LT3950. First, the voltage at the CTRL pin,

which sets the sense resistor regulation threshold, pro-

vides continuous, analog dimming of the LED load. In

addition, two method of PWM dimming exist. The first,

external PWM, relies on a user-provided PWM signal. This

signal drives the PWM pin directly, causing the system

to turn off and on (meaning stop and start switching,

and also disconnect and reconnect the LED load to the

output capacitor via PWMTG) based on the duty ratio of

the PWM pin voltage. Alternatively, internal PWM dim-

ming is available.

Internal PWM dimming uses an internal analog-to-digital

converter to translate the voltage at the PWM pin to a

7-bit digital representation. This conversion uses a lin-

ear scale; every 7.8mV (typ.) the 7-bit value changes.

Each particular value corresponds to a unique duty ratio

that is separated exponentially from its neighbors. For

example, moving by 7.8mV (typ.) near the 10% duty ratio

region can result in a change from 9.6% to 10% duty

ratio. Moving by the same difference, 7.8mV (typ.) near

the 100% region can change the duty ratio from 96%

to 100%. A smooth ramp at the PWM pin lasting many

PWMTG dimming periods as set by RP will create an

exponentially increasing PWM duty ratio for the LED load.

This preserves dimming accuracy and resolution across

a wide range of PWM dimming duty ratios.

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