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LT3477 Datasheet(PDF) 14 Page - Analog Devices |
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LT3477 Datasheet(HTML) 14 Page - Analog Devices |
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14 / 26 page ![]() LT3950 14 Rev. 0 For more information www.analog.com The PWM dimming generator clock offers two program- ming options. For a separate, free-running clock with respect to the switching frequency, connect a resistor from the RP pin to ground. Similar to the RT pin, the RP pin sets the frequency of PWM dimming as a function of resistance. Table 2. Selected RP Values and PWM Dimming Frequency RP Value (kΩ) PWM Dimming Frequency (Hz) 634 100 274 200 162 300 107 400 75 500 Alternatively, the PWM dimming clock can lock to the switching clock. To do this, simply tie the RP pin to INTVCC. In this mode, the PWM clock will be the switch- ing clock divided by 4096. Pulse Width Modulation (PWM) Dimming Pulse width modulation (PWM) allows high dynamic range dimming of the LED load. When using PWM dim- ming, a pulse train with duty ratio proportional to desired LED current controls the load. During ON periods, the part operates normally. During OFF periods the part stops switching. While the part is not switching, the compensa- tion node is high impedance to minimize changes to the compensation capacitor voltage. This reduces transient settling time when the next ON period arrives. In addi- tion to this, LT3950 provides an optional load disconnect. Disconnecting the load makes turn-off much faster, as the output capacitor does not continue to conduct current into the load. Transient settling time is also shorter when turning back on, as the output capacitor’s state is less affected by the load. To use the external load disconnect, tie a PMOS in series with the load such that the source of the PMOS connects to the ISN node, and the drain to the LED load. Connect the gate of the PMOS to the PWMTG pin. The voltage at the PWMTG pin will vary between VISP and VISP – 7.5V to turn the PMOS off and on. Note that this configuration works for any of the supported power stage topologies. APPLICATIONS INFORMATION For more information on power stage topologies, see the example application circuits. The PWM pin allows two modes of PWM dimming. The first mode is external PWM. In this mode, a digital signal created by some other device, such as a microprocessor, drives the PWM pin. This PWM signal directly controls the part: when this signal is high, the part runs, when this signal is low, the part does not run, and disconnects the load if an external PMOS is used. Tying the PWM pin to INTVCC results in continuous, uninterrupted operation. Conversely, tying the PWM pin to ground results in the system remaining idle indefinitely. For ON time < 1µs, use a low QG (<10nC) MOSFET and low or zero value for RC at VC pin. External PWM supports dimming dynamic range up to 20,000:1. The second mode of PWM dimming is internal. When using internal PWM dimming, the analog voltage at the PWM pin controls the duty ratio of the PWMTG signal. The voltage range for internal PWM dimming is from 0.2V to 1.2V at the PWM pin. The internal PWM generator con- verts the voltage at the PWM pin to a 7-bit digital rep- resentation. The analog to digital converter responsible for this uses a linear scale, each code is around 7.8mV wide. Each 7-bit code corresponds to a unique duty ratio value. The values of duty ratio are separated exponentially. Another way to phrase it is that each time the 7-bit code increases in value by 1, the duty ratio is multiplied by a constant scaling factor. A log-scale plot of duty ratio vs PWM pin voltage appears below. Figure 4. PWM Duty Ratio PWM PIN VOLTAGE (V) 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 0.5 1 10 100 3950 F04 |
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