MAX1997 datasheet(17/31 Pages) MAXIM

17 / 31 page

Quintuple/Triple-Output TFT LCD Power Supplies

with Fault Protection and VCOM Buffer

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Positive Linear-Regulator

Controller, REG P

The positive linear-regulator controller is an analog gain

block with an open-drain N-channel output. It drives an

external PNP pass transistor with a 6.8k

Ω base-to-emitter

resistor (Figure 1). Its guaranteed base drive sink current

is at least 2mA. The regulator is designed to deliver 20mA

with an output capacitor of 1µF.

REG P is enabled when SHDN is high, the gate to the

input P-channel MOSFET is low, ONDC is high, VCT >

VONP, and the soft-start of the main step-up regulator is

complete. (See the Power-Up Sequencing and Inrush

Current Control section.) Each time it is enabled, the

regulator goes through a soft-start routine that ramps

up its reference input.

Note that the voltage rating of the DRVP output is 28V. If

higher voltages are present, an external cascode NPN

transistor should be used with the emitter connected to

DRVP, the base to VMAIN, and the collector to the base

of the PNP (Figure 4).

REG P is typically used to provide the TFT LCD gate

driver’s gate-on voltage. A sufficient voltage can be

produced using a charge-pump circuit as shown in

Figure 1. Use as many stages as necessary to obtain

the required output voltage. (See the Selecting the

Number of Charge-Pump Stages section.)

Negative Linear-Regulator

Controller, REG N

The negative linear-regulator controller is an analog

gain block with an open-drain P-channel output. It dri-

ves an external NPN pass transistor with a 6.8k

Ω

base-to-emitter resistor (Figure 1). Its guaranteed base

drive source current is at least 2mA. The regulator is

designed to deliver 20mA with an output capacitor of

0.47µF.

REG N is enabled when SHDN is high, the gate to the

input P-channel MOSFET is low, ONDC is high, and

VCT > V ONN (see the Power-Up Sequencing and Inrush

Current Control section). Each time it is enabled, the

regulator goes through a soft-start routine that ramps

down its reference input.

Note that the voltage rating of the DRVN output is

VIN - 28V. If lower voltages are present, an external

cascode PNP transistor should be used with the emitter

connected to DRVN, the base to GND, and the collec-

tor to the base of the NPN (Figure 5).

REG N is typically used to provide the TFT LCD gate

driver’s gate-off voltage. A negative voltage can be pro-

duced using a charge-pump circuit as shown in Figure

1. Use as many stages as necessary to obtain the

required output voltage. (See the Selecting the Number

of Charge-Pump Stages section.)

Linear-Regulator Controller, REG 1

(MAX1997 Only)

The linear-regulator controller REG 1 is an analog gain

block with an open-drain N-channel output. It drives an

external PNP pass transistor with a 510

Ω base-to-emitter

resistor (Figure 1). Its guaranteed base-drive sink current

is at least 5mA. The regulator is designed to deliver

300mA with an output capacitor of 10µF.

REG 1 is enabled when SHDN is high and the gate to

the input P-channel MOSFET is low. (See the Power-Up

Sequencing and Inrush Current Control section.) Each

time it is enabled, the regulator goes through a soft-

start routine that ramps up its reference input. REG 1 is

typically used to provide the TFT LCD timing

controller’s logic supply.

Figure 4. Using Cascode NPN for Output Voltages > 28V

VMAIN

VG_ON

DRVP

FBP

PNP PASS

TRANSISTOR

NPN CASCODE

TRANSISTOR

Figure 5. Using Cascode PNP for Output Voltages < VIN - 28V

VG_OFF

DRVN

FBN

REF

NPN PASS

TRANSISTOR

PNP CASCODE

TRANSISTOR

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