MAX1997 datasheet(26/31 Pages) MAXIM

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Quintuple/Triple-Output TFT LCD Power Supplies

with Fault Protection and VCOM Buffer

______________________________________________________________________________________

Flying Capacitors

Increasing the flying capacitor (CX) value increases the

output current capability. Increasing the capacitance

indefinitely has a negligible effect on output current

capability because the internal switch resistance and

the diode impedance limit the source impedance. A

0.1µF ceramic capacitor works well in most low-current

applications. The flying capacitor’s voltage rating must

exceed the following:

VCX > N ✕ VMAIN

where N is the stage number in which the flying capaci-

tor appears, and VMAIN is the main output voltage. For

example, the two-stage positive charge pump in the

typical application circuit (Figure 1) where VMAIN = 9V

contains two flying capacitors. The flying capacitor in

the first stage (C25) requires a voltage rating greater

than 9V. The flying capacitor in the second stage (C24)

requires a voltage rating greater than 18V.

Charge-Pump Output Capacitor

Increasing the output capacitance or decreasing the

ESR reduces the output ripple voltage and the peak-to-

peak transient voltage. With ceramic capacitors, the

output voltage ripple is dominated by the capacitance

value. Use the following equation to approximate the

required capacitor value:

where VRIPPLE is the peak-to-peak value of the output

ripple.

Charge-Pump Rectifier Diodes

Use Schottky diodes with a current rating equal to or

greater than two times the average charge-pump input

current. If the loaded charge-pump output voltage is

greater than required, some or all of the Schottky

diodes can be replaced with low-cost silicon switching

diodes with an equivalent current rating. The charge-

pump input current is:

ICP_IN = ICP_OUT ✕ N

where N is the number of charge-pump stages.

Linear-Regulator Controllers

Output Voltage Selection

Adjust the positive linear-regulator (REG P) output volt-

age by connecting a resistive voltage-divider from

VG_ON to GND with the center tap connected to FBP

(Figure 1). Select R20 in the range of 10k

Ω to 30kΩ.

Calculate R19 with the following equation:

R19 = R20 [(VG_ON / VFBP) - 1]

where VFBP = 1.25V.

The output voltages of linear regulators REG 1 and

REG 2 can be similarly adjusted.

Adjust the negative linear-regulator (REG N) output

voltage by connecting a resistive voltage-divider from

VG_OFF to REF with the center tap connected to FBN

(Figure 1). Select R17 in the range of 10k

Ω to 30kΩ.

Calculate R16 with the following equation:

R16 = R17 [(VFBN - VG_OFF) / (VREF - VFBN)]

where VFBN = 125mV, VREF = 1.25V. REF can source

up to 75µA, using a resistor greater than 17k

Ω for R17

leaves at least 10µA for other uses.

Pass Transistor Selection

The pass transistor must meet specifications for current

gain (

β), input capacitance, collector-emitter saturation

voltage, and power dissipation. The transistor’s current

gain limits the guaranteed maximum output current to:

where IDRV is the minimum guaranteed base drive cur-

rent, VBE is the base-to-emitter voltage of the transistor,

and RBE is the pullup resistor connected between the

transistor’s base and emitter. Furthermore, the transis-

tor’s current gain increases the linear regulator’s DC

loop gain (see the Stability Requirements section), so

excessive gain destabilizes the output. Therefore, tran-

sistors with current gain over 100 at the maximum out-

put current can be difficult to stabilize and are not

recommended. The transistor’s input capacitance and

input resistance also create a second pole, which

could be low enough to make the output unstable when

heavily loaded.

The transistor’s saturation voltage at the maximum out-

put current determines the minimum input-to-output

voltage differential that the linear regulator supports.

Alternatively, the package’s power dissipation could

limit the usable maximum input-to-output voltage differ-

ential. The maximum power dissipation capability of the

transistor’s package and mounting must exceed the

actual power dissipation in the device. The power dissi-

pation equals the maximum load current times the max-

imum input-to-output voltage differential:

P = ILOAD(MAX) (VLDOIN - VLDOOUT) = ILOAD(MAX) VCE

LOAD(MAX)

DRV

MIN









−

OUT

LOAD

OSC RIPPLE

≥

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