LTM8045 datasheet(31/54 Pages) AD

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LTM4655

Rev. 0

For more information www.analog.com

Negative Output Current Capability Varies as a

Function of VINn to VOUTn– Conversion Ratios,

Negative-VOUT– Operation

In negative-VOUT operation, the output current capability of

the LTM4655 has a strong dependency on the operating

input (VINn) and output (VOUTn–) voltages. See Figure 6.

these effects is shown the plots in Figure 6 and described

by Equation 19.

IOUTn(CAPABILITY) =

VINn • InPK –

ΔInPK–PK

⎛

⎝⎜

⎞

⎠⎟

•

ηn

VINn – VOUTn

–

(19)

where:

∆InPK-PK is the channel n inductor ripple current, in

amps, and ηn (unitless) is the channel efficiency of the

LTM4655.

For completeness, ∆InPK-PK is given by Equation 20.

ΔInPK–PK =

Ln •fSWn •

VINn

–

VOUTn

–

⎛

⎝⎜

⎞

⎠⎟

(20)

where:

Ln is 4μH, the LTM4655 channel’s power inductor value,

and fSWn is the switching frequency of the LTM4655’s

channel, in MHz.

For a practical design, ∆InPK-PK is designed to be less

than ~2APK-PK.

For a practical design, the LTM4655’s on-time of MTn

each switching cycle should be designed to exceed the

LTM4655 control loop’s specified minimum on-time

of 60ns, tON(MIN), (guardband to 90ns). For example,

Equation 21.

fSWn

> TONn(MIN)

(21)

where Dn (unitless) is the duty-cycle of MTn, given by

Equation 22.

VOUTn+ – VOUTn

–

VINn – VOUTn

–

(22)

Combining Equation 22 with Equation 19, it can be illus-

trative to see Equation 23.

IOUTn(CAPABILITY) =(1–Dn)• InPK –

ΔInPK–PK

⎛

⎝⎜

⎞

⎠⎟

•

ηn

(23)

APPLICATIONS INFORMATION

Figure 6. Channel Output Current Capability*,

Negative-VOUT Operation

*Current limit frequency-foldback activates at load cur-

rents higher than indicated curves. Continuous channel

output current capability subject to details of appli-

cation implementation. Switching frequency set per

Table 1. See Notes 2 and 3.

The reason for this is inherent in the two-switch buck-boost

topology employed by the LTM4655 when so-configured

for negative-VOUT operation. To protect the primary power

MOSFET (MTn) from overstress (see Simplified Block

Diagram), its peak current (InPK) is limited by control

circuitry to 6A. When MTn is on, observe that no current

flows to LTM4655’s output; furthermore, observe that

only when MTn is off does current flow to the output of

the LTM4655. As a consequence of this arrangement: for

a given output voltage, current limit inception activates

sooner at low line (higher, larger duty cycle) than at high

line (lower, smaller duty cycle). A further consequence

is: for a given input voltage, the output power capability

of the LTM4655 is higher for lower-magnitude VOUTn–

(lower, smaller duty cycle) than for higher-magnitude

VOUTn– (higher, larger duty cycle). The combination of

VOUT– = –0.5V

VOUT– = –3.3V

VOUT– = –5V

VOUT– = –8V

VOUT– = –12V

VOUT– = –15V

VOUT– = –20V

VOUT– = –24V

INPUT VOLTAGE (V)

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4655 F06

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