LTM8045 datasheet(29/54 Pages) AD

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LTM4655

Rev. 0

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Hot Plugging Safely

The small size, robustness and low impedance of ceramic

capacitors make them an attractive option for the input

bypass capacitors (CDn and CINHn) of the LTM4655.

However, these capacitors can cause problems if the

LTM4655 is plugged into a live supply (see Analog Devices

Application Note 88 for a complete discussion). The low

loss ceramic capacitor combined with stray inductance in

series with the power source forms an under damped tank

circuit, and the voltage at the VINn pin of the LTM4655 can

ring to twice the nominal input voltage, possibly exceed-

ing the LTM4655’s rating and damaging the part. If the

input supply is poorly controlled or the user will be plug-

ging the LTM4655 into an energized supply, the input

network should be designed to prevent this overshoot by

introducing a damping element into the path of current

flow. This is often done by adding an inexpensive elec-

trolytic bulk capacitor (CINLn) across the input terminals

of the LTM4655. The selection criteria for CINLn calls for:

an ESR high enough to damp the ringing; a capacitance

value several times larger than CINHn; a suitable ripple cur-

rent rating. CINLn does not need to be located physically

close to the LTM4655; it should be located close to the

application board’s input connector, instead.

Input Disconnect/Input Short Considerations

If at any point the input supply is removed with the output

voltage still held high through its capacitor, power will be

drawn from the output capacitor to power the module,

until the output voltage drops below the minimum SVINn/

VINn requirements of the module.

However, if the SVINn/VINn pins are grounded while the

output is held high, regardless of the RUN

n state, para-

sitic body diodes inside the LTM4655 will pull current

from the output through the VOUTn+ pins. Depending on

the size of the output capacitor and the resistivity of the

short, high currents may flow through the internal body

diode, and cause damage to the part. If discharge of

SVINn/VINn by the input source is possible, preventative

measures should be taken to prevent current flow through

the internal body diode. Simple solutions would be plac-

ing a Schottky diode in series with the supply (Figure 3),

or placing a Schottky diode from VOUTn+ to SVINn/VINn

APPLICATIONS INFORMATION

Figure 3. Schottky Diode in Series with the Supply

Figure 4. Schottky Diode from VOUTn+ to VINn

CINHn

ZDn

OPT

4.7µF

VINn

SVINn

VINn

LTM4655

4655 F03

CINHn

4.7µF

COUTn

47µF

VINn

SVINn

VINn

VOUTn

VOUTn+

LTM4655

4655 F04

(Figure 4). Applications with loads that experience large

load-step release, load dump or other mechanisms that

invoke reverse energy flow in the Figure 3 circuit may

need a suitably-rated Zener diode protection clamp, to

limit the resulting transient voltage rise on SVINn/VINn

and CINHn.

INTVCCn and EXTVCCn Connection

When RUN

n is logic high, an internal low dropout regula-

tor regulates an internal supply, INTVCCn, that powers the

control circuitry for driving LTM4655’s channel

n internal

MOSFETs. INTVCCn is regulated at 3.3V. In this manner,

the LTM4655’s INTVCCn is directly powered from SVINn,

by default. The gate driver current through the INTVCCn

LDO is about 20mA for a typical 1MHz application. The

internal LDO power dissipation can be calculated as

shown in Equation 16.

PLDO_LOSSn(INTVCC) = 20mA •(SVINn− − VOUTn− –3V)

(16)

The LDO draws current off of EXTVCCn instead of SVINn

when EXTVCCn–VOUTn– exceeds 3.2V and SVINn–SVOUTn–

exceeds 5V. For output voltages of 4V and higher, EXTVCCn

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